leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
43b059884a
u-boot/arch/riscv/cpu
History
Yu Chien Peter Lin c277c787a0 riscv: Fix detecting FPU support in standard extension 
We should check the string until it hits underscore, in case it
searches multi-letter extensions. For example, "rv64imac_xandes"
will be treated as D extension support since there is a "d" in
"andes", resulting illegal instruction caused by initializing FCSR.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-11-15 15:37:17 +08:00
..
ax25 riscv: Rename Andes PLIC to PLICSW 2022-11-03 13:27:56 +08:00
fu540 board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
fu740 board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
generic board_f: Fix types for board_get_usable_ram_top() 2022-09-23 15:12:42 -04:00
cpu.c riscv: Fix detecting FPU support in standard extension 2022-11-15 15:37:17 +08:00
Makefile riscv: Move trap handler codes to mtrap.S 2018-12-18 09:56:27 +08:00
mtrap.S riscv: Add option to print registers on exception 2020-02-10 14:51:08 +08:00
start.S riscv: Introduce AVAILABLE_HARTS 2022-09-26 14:29:13 +08:00
u-boot-spl.lds linker_lists: Rename sections to remove . prefix 2022-06-23 12:58:18 -04:00
u-boot.lds linker_lists: Rename sections to remove . prefix 2022-06-23 12:58:18 -04:00