425101e115
Remove the prototypes for zoom2_serial_deviceN from serial.h . This can't be done right away, as they are referenced from the zoom2 config file. Therefore, adjust the code so the config file only specifies number of the port. Then, replace the simple return in default_serial_console() with a switch across possible values, which returns the zoom2_serial_deviceN . With such adjustment in place, the exported prototypes in serial.h can be safely removed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
257 lines
7.5 KiB
C
257 lines
7.5 KiB
C
/*
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* (C) Copyright 2006-2009
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* Texas Instruments.
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <x0khasim@ti.com>
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* Nishanth Menon <nm@ti.com>
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* Tom Rix <Tom.Rix@windriver.com>
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*
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* Configuration settings for the TI OMAP3430 Zoom II board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP34XX 1 /* which is a 34XX */
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#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */
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#define CONFIG_OMAP_GPIO
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#define CONFIG_SDRC /* The chip has SDRC controller */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/omap3.h>
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_REVISION_TAG 1
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#define CONFIG_OF_LIBFDT 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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/* Sector */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
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/*
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* Hardware drivers
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*/
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/*
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* NS16550 Configuration
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* Zoom2 uses the TL16CP754C on the debug board
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*/
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#define CONFIG_SERIAL_MULTI 1
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/*
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* 0 - 1 : first USB with respect to the left edge of the debug board
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* 2 - 3 : second USB with respect to the left edge of the debug board
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*/
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#define ZOOM2_DEFAULT_SERIAL_DEVICE 0
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#define V_NS16550_CLK (1843200) /* 1.8432 Mhz */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_REG_SIZE (-2)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200}
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_GENERIC_MMC 1
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#define CONFIG_MMC 1
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#define CONFIG_OMAP_HSMMC 1
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#define CONFIG_DOS_PARTITION 1
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/* Status LED */
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#define CONFIG_STATUS_LED 1 /* Status LED enabled */
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#define CONFIG_BOARD_SPECIFIC_LED 1
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#define STATUS_LED_BLUE 0
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#define STATUS_LED_RED 1
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/* Blue */
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#define STATUS_LED_BIT STATUS_LED_BLUE
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#define STATUS_LED_STATE STATUS_LED_ON
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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/* Red */
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#define STATUS_LED_BIT1 STATUS_LED_RED
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#define STATUS_LED_STATE1 STATUS_LED_OFF
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#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
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/* Optional value */
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#define STATUS_LED_BOOT STATUS_LED_BIT
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/* GPIO banks */
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#ifdef CONFIG_STATUS_LED
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#define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
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#define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
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#endif
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#define CONFIG_OMAP3_GPIO_3 /* board revision */
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#define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
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/* USB */
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#define CONFIG_MUSB_UDC 1
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#define CONFIG_USB_OMAP3 1
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#define CONFIG_TWL4030_USB 1
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/* USB device configuration */
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#define CONFIG_USB_DEVICE 1
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#define CONFIG_USB_TTY 1
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/* Change these to suit your needs */
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#define CONFIG_USBD_VENDORID 0x0451
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#define CONFIG_USBD_PRODUCTID 0x5678
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#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
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#define CONFIG_USBD_PRODUCT_NAME "Zoom2"
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MMC /* MMC support */
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
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#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
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#undef CONFIG_CMD_IMI /* iminfo */
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#undef CONFIG_CMD_IMLS /* List all found images */
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#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
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#undef CONFIG_CMD_NFS /* NFS support */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_HARD_I2C 1
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_BUS 0
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#define CONFIG_SYS_I2C_BUS_SELECT 1
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#define CONFIG_DRIVER_OMAP34XX_I2C 1
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/*
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* TWL4030
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*/
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#define CONFIG_TWL4030_POWER 1
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#define CONFIG_TWL4030_LED 1
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/*
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* Board NAND Info.
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*/
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
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/* to access nand */
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
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/* to access nand at */
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/* CS0 */
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#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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/* Environment information */
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#define CONFIG_BOOTDELAY 10
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"usbtty=cdc_acm\0" \
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # "
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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/* Memtest from start of memory to 31MB */
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)
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/* The default load address is the start of memory */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
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/* everything, incl board info, in Hz */
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#undef CONFIG_SYS_CLKS_IN_HZ
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/*
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* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
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* 32KHz clk, or from external sig. This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
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#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/* **** PISMO SUPPORT *** */
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/* Configure the PISMO */
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#define PISMO1_NAND_SIZE GPMC_SIZE_128M
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#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
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#if defined(CONFIG_CMD_NAND)
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#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
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#endif
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_ENV_IS_IN_NAND 1
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#define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#endif /* __CONFIG_H */
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