5ae5aa9310
U-Boot sets up the real mode interrupt handler stubs starting from address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff) system memory is reported as system RAM in E820 table to the OS. (see install_e820_map() implementation for each platform). So OS can use these memories whatever it wants. If U-Boot is in an S3 resume path, care must be taken not to corrupt these memorie otherwise OS data gets lost. Testing shows that, on Microsoft Windows 10 on Intel Baytrail its wake up vector happens to be installed at the same address 0x1000. While on Linux its wake up vector does not overlap this memory range, but after resume kernel checks low memory range per config option CONFIG_X86_RESERVE_LOW which is 64K by default to see whether a memory corruption occurs during the suspend/resume (it's harmless, but warnings are shown in the kernel dmesg logs). We cannot simply mark the these memory as reserved in E820 table because such configuration makes GRUB complain: unable to allocate real mode page. Hence we choose to back up these memories to the place where we reserved on our stack for our S3 resume work. Before jumping to OS wake up vector, we need restore the original content there. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
132 lines
2.9 KiB
C
132 lines
2.9 KiB
C
/*
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* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ACPI_S3_H__
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#define __ASM_ACPI_S3_H__
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#define WAKEUP_BASE 0x600
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/* PM1_STATUS register */
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#define WAK_STS (1 << 15)
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#define PCIEXPWAK_STS (1 << 14)
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#define RTC_STS (1 << 10)
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#define SLPBTN_STS (1 << 9)
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#define PWRBTN_STS (1 << 8)
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#define GBL_STS (1 << 5)
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#define BM_STS (1 << 4)
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#define TMR_STS (1 << 0)
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/* PM1_CNT register */
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#define SLP_EN (1 << 13)
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#define SLP_TYP_SHIFT 10
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#define SLP_TYP (7 << SLP_TYP_SHIFT)
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#define SLP_TYP_S0 0
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#define SLP_TYP_S1 1
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#define SLP_TYP_S3 5
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#define SLP_TYP_S4 6
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#define SLP_TYP_S5 7
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/* Memory size reserved for S3 resume */
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#define S3_RESERVE_SIZE 0x1000
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#ifndef __ASSEMBLY__
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extern char __wakeup[];
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extern int __wakeup_size;
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enum acpi_sleep_state {
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ACPI_S0,
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ACPI_S1,
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ACPI_S2,
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ACPI_S3,
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ACPI_S4,
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ACPI_S5,
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};
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/**
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* acpi_ss_string() - get ACPI-defined sleep state string
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*
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* @pm1_cnt: ACPI-defined sleep state
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* @return: a pointer to the sleep state string.
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*/
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static inline char *acpi_ss_string(enum acpi_sleep_state state)
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{
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char *ss_string[] = { "S0", "S1", "S2", "S3", "S4", "S5"};
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return ss_string[state];
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}
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/**
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* acpi_sleep_from_pm1() - get ACPI-defined sleep state from PM1_CNT register
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*
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* @pm1_cnt: PM1_CNT register value
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* @return: ACPI-defined sleep state if given valid PM1_CNT register value,
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* -EINVAL otherwise.
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*/
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static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt)
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{
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switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) {
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case SLP_TYP_S0:
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return ACPI_S0;
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case SLP_TYP_S1:
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return ACPI_S1;
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case SLP_TYP_S3:
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return ACPI_S3;
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case SLP_TYP_S4:
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return ACPI_S4;
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case SLP_TYP_S5:
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return ACPI_S5;
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}
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return -EINVAL;
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}
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/**
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* chipset_prev_sleep_state() - Get chipset previous sleep state
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*
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* This returns chipset previous sleep state from ACPI registers.
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* Platform codes must supply this routine in order to support ACPI S3.
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*
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* @return ACPI_S0/S1/S2/S3/S4/S5.
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*/
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enum acpi_sleep_state chipset_prev_sleep_state(void);
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/**
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* chipset_clear_sleep_state() - Clear chipset sleep state
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*
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* This clears chipset sleep state in ACPI registers.
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* Platform codes must supply this routine in order to support ACPI S3.
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*/
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void chipset_clear_sleep_state(void);
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struct acpi_fadt;
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/**
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* acpi_resume() - Do ACPI S3 resume
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*
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* This calls U-Boot wake up assembly stub and jumps to OS's wake up vector.
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*
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* @fadt: FADT table pointer in the ACPI table
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* @return: Never returns
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*/
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void acpi_resume(struct acpi_fadt *fadt);
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/**
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* acpi_s3_reserve() - Reserve memory for ACPI S3 resume
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*
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* This copies memory where real mode interrupt handler stubs reside to the
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* reserved place on the stack.
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*
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* This routine should be called by reserve_arch() before U-Boot is relocated
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* when ACPI S3 resume is enabled.
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*
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* @return: 0 always
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*/
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int acpi_s3_reserve(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ACPI_S3_H__ */
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