Sean Anderson 404339759e riscv: Remove unnecessary instruction ... The add instruction on risc-v can have any three sources and targets, so there is no need for an intermediate mov. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2020-02-10 14:51:52 +08:00
..
cpu	riscv: Remove unnecessary instruction	2020-02-10 14:51:52 +08:00
dts	riscv: dts: Add #address-cells and #size-cells in nor node	2019-12-10 08:23:10 +08:00
include/asm	asm: dma-mapping.h: Fix dma mapping functions	2020-01-25 12:04:36 -05:00
lib	riscv: Add option to print registers on exception	2020-02-10 14:51:08 +08:00
config.mk	riscv: qemu: define standalone load address	2019-01-15 09:36:31 +08:00
Kconfig	riscv: Add option to print registers on exception	2020-02-10 14:51:08 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00