2dfdd0c4de
CONFIG_{SPL,TPL}_SIZE_LIMIT are defined as hex (SPL_SIZE_LIMIT was
converted in b51882d0
("spl: Convert CONFIG_SPL_SIZE_LIMIT to hex"), but
there are still places that reference integer values. Change those to hex
as well. Also, update the Makefile to check for 0x0 instead of 0.
This also fixes the following build error when CONFIG_SPL_SIZE_LIMIT
is set by menuconfig to 0x0:
...
spl/u-boot-spl.bin exceeds file size limit:
limit: 0 bytes
actual: 0x80f0 bytes
excess: 0x80f0 bytes
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
68 lines
1.7 KiB
Plaintext
68 lines
1.7 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_ARCH_IMXRT=y
|
|
CONFIG_SYS_TEXT_BASE=0x80002000
|
|
CONFIG_SPL_GPIO_SUPPORT=y
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_ENV_OFFSET=0x80000
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_SPL_TEXT_BASE=0x20209000
|
|
CONFIG_TARGET_IMXRT1020_EVK=y
|
|
CONFIG_SPL_MMC_SUPPORT=y
|
|
CONFIG_SPL_SERIAL_SUPPORT=y
|
|
CONFIG_SPL_SIZE_LIMIT=0x20000
|
|
CONFIG_SPL=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk"
|
|
CONFIG_DISTRO_DEFAULTS=y
|
|
CONFIG_SD_BOOT=y
|
|
# CONFIG_USE_BOOTCOMMAND is not set
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_SPL_BOARD_INIT=y
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
|
|
# CONFIG_SPL_CRC32_SUPPORT is not set
|
|
# CONFIG_BOOTM_NETBSD is not set
|
|
# CONFIG_BOOTM_PLAN9 is not set
|
|
# CONFIG_BOOTM_RTEMS is not set
|
|
# CONFIG_BOOTM_VXWORKS is not set
|
|
# CONFIG_CMD_MII is not set
|
|
# CONFIG_DOS_PARTITION is not set
|
|
# CONFIG_ISO_PARTITION is not set
|
|
# CONFIG_EFI_PARTITION is not set
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_ENV_IS_NOWHERE=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
|
CONFIG_TFTP_BLOCKSIZE=512
|
|
CONFIG_SPL_DM=y
|
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
|
# CONFIG_OF_TRANSLATE is not set
|
|
CONFIG_SPL_CLK_COMPOSITE_CCF=y
|
|
CONFIG_CLK_COMPOSITE_CCF=y
|
|
CONFIG_SPL_CLK_IMXRT1020=y
|
|
CONFIG_CLK_IMXRT1020=y
|
|
# CONFIG_SPL_DM_GPIO is not set
|
|
CONFIG_MXC_GPIO=y
|
|
# CONFIG_INPUT is not set
|
|
CONFIG_DM_MMC=y
|
|
CONFIG_FSL_USDHC=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_PINCTRL_IMXRT=y
|
|
CONFIG_RAM=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_IMXRT_SDRAM=y
|
|
CONFIG_FSL_LPUART=y
|
|
CONFIG_TIMER=y
|
|
CONFIG_SPL_TIMER=y
|
|
CONFIG_SHA1=y
|
|
CONFIG_SHA256=y
|
|
CONFIG_HEXDUMP=y
|