c7430d7d5e
MX6Q/QP IPU operates at 264MHz and MX6DL IPU at 198MHz. When running a SPL target, which supports multiple MX6 variants we cannot properly setup the IPU clock frequency via CONFIG_IPUV3_CLK option as such decision is done in build-time currently. Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be configured in run-time on mx6. Reported-by: Eric Nelson <eric@nelint.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de> [agust: fixed #endif in cgtqmx6eval.h] Signed-off-by: Anatolij Gustschin <agust@denx.de> |
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| .. | ||
| bridge | ||
| exynos | ||
| fonts | ||
| rockchip | ||
| sunxi | ||
| tegra124 | ||
| am335x-fb.c | ||
| am335x-fb.h | ||
| anx9804.c | ||
| anx9804.h | ||
| ati_ids.h | ||
| ati_radeon_fb.c | ||
| ati_radeon_fb.h | ||
| atmel_hlcdfb.c | ||
| atmel_lcdfb.c | ||
| backlight-uclass.c | ||
| bcm2835.c | ||
| broadwell_igd.c | ||
| bus_vcxk.c | ||
| cfb_console.c | ||
| console_normal.c | ||
| console_rotate.c | ||
| console_truetype.c | ||
| coreboot.c | ||
| da8xx-fb.c | ||
| da8xx-fb.h | ||
| display-uclass.c | ||
| dw_hdmi.c | ||
| formike.c | ||
| fsl_dcu_fb.c | ||
| fsl_diu_fb.c | ||
| hitachi_tx18d42vm_lcd.c | ||
| hitachi_tx18d42vm_lcd.h | ||
| i915_reg.h | ||
| ipu_common.c | ||
| ipu_disp.c | ||
| ipu_regs.h | ||
| ipu.h | ||
| ivybridge_igd.c | ||
| Kconfig | ||
| ld9040.c | ||
| lg4573.c | ||
| Makefile | ||
| mb862xx.c | ||
| mvebu_lcd.c | ||
| mx3fb.c | ||
| mxc_ipuv3_fb.c | ||
| mxcfb.h | ||
| mxsfb.c | ||
| omap3_dss.c | ||
| panel-uclass.c | ||
| pwm_backlight.c | ||
| pxa_lcd.c | ||
| s6e8ax0.c | ||
| s6e63d6.c | ||
| sandbox_sdl.c | ||
| scf0403_lcd.c | ||
| simple_panel.c | ||
| ssd2828.c | ||
| ssd2828.h | ||
| stb_truetype.h | ||
| tegra.c | ||
| vesa.c | ||
| vidconsole-uclass.c | ||
| video_bmp.c | ||
| video-uclass.c | ||
| videomodes.c | ||
| videomodes.h | ||