3365b4eb55
The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
91 lines
2.1 KiB
Plaintext
91 lines
2.1 KiB
Plaintext
U-Boot for UniPhier SoC family
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==============================
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Tested toolchains
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-----------------
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(a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-)
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If you are building U-Boot on Ubuntu, its standard package is recommended.
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You can install it as follows:
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$ sudo apt-get install gcc-arm-linux-gnueabi-
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(b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-)
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You can download pre-built toolchains from:
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http://www.linaro.org/downloads/
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(c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-)
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You can download pre-built toolchains from:
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ftp://www.kernel.org/pub/tools/crosstool/files/bin/
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Compile the source
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------------------
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PH1-sLD3:
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$ make ph1_sld3_defconfig
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$ make CROSS_COMPILE=arm-linux-gnueabi-
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PH1-LD4:
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$ make ph1_ld4_defconfig
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$ make CROSS_COMPILE=arm-linux-gnueabi-
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PH1-Pro4:
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$ make ph1_pro4_defconfig
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$ make CROSS_COMPILE=arm-linux-gnueabi-
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PH1-sLD8:
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$ make ph1_sld8_defconfig
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$ make CROSS_COMPILE=arm-linux-gnueabi-
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You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
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to use your favorite compiler.
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Burn U-Boot images to NAND
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--------------------------
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Write two files to the NAND device as follows:
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- spl/u-boot-spl.bin at the offset address 0x00000000
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- u-boot-dtb.img at the offset address 0x00010000
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If a TFTP server is available, the images can be easily updated.
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Just copy the u-boot-spl.bin and u-boot-dtb.img to the TFTP public directory,
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and then run the following command at the U-Boot command line:
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=> run nandupdate
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UniPhier specific commands
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--------------------------
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- pinmon (enabled by CONFIG_CMD_PINMON)
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shows the boot mode pins that has been latched at the power-on reset
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- ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
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shows the DDR PHY parameters set by the PHY training
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Supported devices
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-----------------
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- UART (on-chip)
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- NAND
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- USB 2.0 (EHCI)
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- USB 3.0 (xHCI)
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- LAN (on-board SMSC9118)
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- I2C
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- EEPROM (connected to the on-board I2C bus)
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- Support card (SRAM, NOR flash, some peripherals)
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--
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Masahiro Yamada <yamada.m@jp.panasonic.com>
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Feb. 2015
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