..
aspeed
dm: Rename dev_addr..() functions
2017-06-01 07:03:01 -06:00
at91
clk: at91: clk-generated: fix incorrect index of clk source
2017-11-29 22:30:50 -05:00
exynos
dm: Rename dev_addr..() functions
2017-06-01 07:03:01 -06:00
renesas
clk: rmobile: Add R8A77995 D3 clock tables
2017-12-09 13:36:25 +01:00
rockchip
rockchip: clk: bind reset driver
2018-01-09 11:13:32 +01:00
tegra
clock: implement a driver for the Tegra CAR
2016-09-27 09:11:02 -07:00
uniphier
clk: uniphier: add NAND controller clock
2017-10-15 22:32:25 +09:00
clk_bcm6345.c
dm: Rename dev_addr..() functions
2017-06-01 07:03:01 -06:00
clk_boston.c
treewide: replace with error() with pr_err()
2017-10-04 11:59:44 -04:00
clk_fixed_rate.c
dm: clk: fixed: Update to support livetree
2017-06-01 07:03:14 -06:00
clk_pic32.c
dm: core: Replace of_offset with accessor
2017-02-08 06:12:14 -07:00
clk_sandbox_test.c
clk: convert API to match reset/mailbox style
2016-06-19 17:05:55 -06:00
clk_sandbox.c
clk: sandbox: don't check clk ID against 0
2016-06-24 17:24:35 -04:00
clk_stm32f.c
board: stm32f429-disco: switch to DM STM32 clock driver
2018-01-10 08:05:46 -05:00
clk_stm32h7.c
stm32: fix STMicroelectronics copyright
2017-11-06 09:51:01 -05:00
clk_zynq.c
dm: clk: Update uclass to support livetree
2017-06-01 07:03:14 -06:00
clk_zynqmp.c
clk: zynqmp: Remove unused macros/variables
2017-08-02 09:11:52 +02:00
clk-hsdk-cgu.c
ARC: clk: introduce HSDK CGU clock driver
2017-12-11 11:36:23 +03:00
clk-uclass.c
dtoc: Put phandle args in an array
2017-09-15 05:27:48 -06:00
Kconfig
ARC: clk: introduce HSDK CGU clock driver
2017-12-11 11:36:23 +03:00
Makefile
ARC: clk: introduce HSDK CGU clock driver
2017-12-11 11:36:23 +03:00