aea3d40d05
As a debug option, add positive confirmation that SPL has completed execution. This can help with diagnosing the location of unexpected hangs. Signed-off-by: Simon Glass <sjg@chromium.org>
359 lines
8.6 KiB
C
359 lines
8.6 KiB
C
/*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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*
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* Aneesh V <aneesh@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <spl.h>
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#include <asm/u-boot.h>
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#include <nand.h>
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#include <fat.h>
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#include <version.h>
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#include <i2c.h>
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#include <image.h>
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#include <malloc.h>
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#include <dm/root.h>
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#include <linux/compiler.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_SYS_UBOOT_START
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#endif
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#ifndef CONFIG_SYS_MONITOR_LEN
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/* Unknown U-Boot size, let's assume it will not be more than 200 KB */
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#define CONFIG_SYS_MONITOR_LEN (200 * 1024)
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#endif
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u32 *boot_params_ptr = NULL;
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struct spl_image_info spl_image;
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/* Define board data structure */
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static bd_t bdata __attribute__ ((section(".data")));
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/*
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* Default function to determine if u-boot or the OS should
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* be started. This implementation always returns 1.
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*
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* Please implement your own board specific funcion to do this.
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*
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* RETURN
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* 0 to not start u-boot
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* positive if u-boot should start
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*/
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#ifdef CONFIG_SPL_OS_BOOT
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__weak int spl_start_uboot(void)
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{
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puts("SPL: Please implement spl_start_uboot() for your board\n");
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puts("SPL: Direct Linux boot not active!\n");
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return 1;
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}
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#endif
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/*
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* Weak default function for board specific cleanup/preparation before
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* Linux boot. Some boards/platforms might not need it, so just provide
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* an empty stub here.
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*/
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__weak void spl_board_prepare_for_linux(void)
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{
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/* Nothing to do! */
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}
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void spl_set_header_raw_uboot(void)
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{
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spl_image.size = CONFIG_SYS_MONITOR_LEN;
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spl_image.entry_point = CONFIG_SYS_UBOOT_START;
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spl_image.load_addr = CONFIG_SYS_TEXT_BASE;
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spl_image.os = IH_OS_U_BOOT;
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spl_image.name = "U-Boot";
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}
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void spl_parse_image_header(const struct image_header *header)
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{
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u32 header_size = sizeof(struct image_header);
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if (image_get_magic(header) == IH_MAGIC) {
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if (spl_image.flags & SPL_COPY_PAYLOAD_ONLY) {
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/*
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* On some system (e.g. powerpc), the load-address and
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* entry-point is located at address 0. We can't load
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* to 0-0x40. So skip header in this case.
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*/
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spl_image.load_addr = image_get_load(header);
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spl_image.entry_point = image_get_ep(header);
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spl_image.size = image_get_data_size(header);
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} else {
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spl_image.entry_point = image_get_load(header);
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/* Load including the header */
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spl_image.load_addr = spl_image.entry_point -
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header_size;
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spl_image.size = image_get_data_size(header) +
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header_size;
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}
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spl_image.os = image_get_os(header);
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spl_image.name = image_get_name(header);
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debug("spl: payload image: %.*s load addr: 0x%x size: %d\n",
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(int)sizeof(spl_image.name), spl_image.name,
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spl_image.load_addr, spl_image.size);
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} else {
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#ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE
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/*
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* CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the
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* code which loads images in SPL cannot guarantee that
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* absolutely all read errors will be reported.
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* An example is the LPC32XX MLC NAND driver, which
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* will consider that a completely unreadable NAND block
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* is bad, and thus should be skipped silently.
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*/
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panic("** no mkimage signature but raw image not supported");
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#else
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/* Signature not found - assume u-boot.bin */
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debug("mkimage signature not found - ih_magic = %x\n",
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header->ih_magic);
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spl_set_header_raw_uboot();
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#endif
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}
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}
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__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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typedef void __noreturn (*image_entry_noargs_t)(void);
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image_entry_noargs_t image_entry =
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(image_entry_noargs_t)(unsigned long)spl_image->entry_point;
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debug("image entry point: 0x%X\n", spl_image->entry_point);
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image_entry();
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}
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#ifdef CONFIG_SPL_RAM_DEVICE
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static void spl_ram_load_image(void)
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{
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const struct image_header *header;
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/*
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* Get the header. It will point to an address defined by handoff
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* which will tell where the image located inside the flash. For
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* now, it will temporary fixed to address pointed by U-Boot.
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*/
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header = (struct image_header *)
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(CONFIG_SYS_TEXT_BASE - sizeof(struct image_header));
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spl_parse_image_header(header);
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}
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#endif
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int spl_init(void)
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{
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int ret;
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debug("spl_init()\n");
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#if defined(CONFIG_SYS_MALLOC_F_LEN)
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gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
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gd->malloc_ptr = 0;
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#endif
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if (IS_ENABLED(CONFIG_OF_CONTROL) &&
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!IS_ENABLED(CONFIG_SPL_DISABLE_OF_CONTROL)) {
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ret = fdtdec_setup();
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if (ret) {
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debug("fdtdec_setup() returned error %d\n", ret);
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return ret;
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}
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}
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if (IS_ENABLED(CONFIG_SPL_DM)) {
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ret = dm_init_and_scan(true);
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if (ret) {
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debug("dm_init_and_scan() returned error %d\n", ret);
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return ret;
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}
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}
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gd->flags |= GD_FLG_SPL_INIT;
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return 0;
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}
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void board_init_r(gd_t *dummy1, ulong dummy2)
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{
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u32 boot_device;
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debug(">>spl:board_init_r()\n");
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#if defined(CONFIG_SYS_SPL_MALLOC_START)
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mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
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CONFIG_SYS_SPL_MALLOC_SIZE);
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gd->flags |= GD_FLG_FULL_MALLOC_INIT;
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#endif
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if (!(gd->flags & GD_FLG_SPL_INIT)) {
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if (spl_init())
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hang();
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}
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#ifndef CONFIG_PPC
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/*
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* timer_init() does not exist on PPC systems. The timer is initialized
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* and enabled (decrementer) in interrupt_init() here.
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*/
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timer_init();
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#endif
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#ifdef CONFIG_SPL_BOARD_INIT
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spl_board_init();
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#endif
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boot_device = spl_boot_device();
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debug("boot device - %d\n", boot_device);
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switch (boot_device) {
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#ifdef CONFIG_SPL_RAM_DEVICE
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case BOOT_DEVICE_RAM:
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spl_ram_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_MMC_SUPPORT
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case BOOT_DEVICE_MMC1:
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case BOOT_DEVICE_MMC2:
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case BOOT_DEVICE_MMC2_2:
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spl_mmc_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_NAND_SUPPORT
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case BOOT_DEVICE_NAND:
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spl_nand_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_ONENAND_SUPPORT
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case BOOT_DEVICE_ONENAND:
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spl_onenand_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_NOR_SUPPORT
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case BOOT_DEVICE_NOR:
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spl_nor_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_YMODEM_SUPPORT
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case BOOT_DEVICE_UART:
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spl_ymodem_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_SPI_SUPPORT
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case BOOT_DEVICE_SPI:
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spl_spi_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_ETH_SUPPORT
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case BOOT_DEVICE_CPGMAC:
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#ifdef CONFIG_SPL_ETH_DEVICE
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spl_net_load_image(CONFIG_SPL_ETH_DEVICE);
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#else
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spl_net_load_image(NULL);
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#endif
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break;
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#endif
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#ifdef CONFIG_SPL_USBETH_SUPPORT
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case BOOT_DEVICE_USBETH:
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spl_net_load_image("usb_ether");
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break;
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#endif
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#ifdef CONFIG_SPL_USB_SUPPORT
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case BOOT_DEVICE_USB:
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spl_usb_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_SATA_SUPPORT
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case BOOT_DEVICE_SATA:
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spl_sata_load_image();
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break;
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#endif
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#ifdef CONFIG_SPL_BOARD_LOAD_IMAGE
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case BOOT_DEVICE_BOARD:
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spl_board_load_image();
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break;
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#endif
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default:
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#if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
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puts("SPL: Unsupported Boot Device!\n");
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#endif
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hang();
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}
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switch (spl_image.os) {
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case IH_OS_U_BOOT:
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debug("Jumping to U-Boot\n");
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break;
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#ifdef CONFIG_SPL_OS_BOOT
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case IH_OS_LINUX:
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debug("Jumping to Linux\n");
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spl_board_prepare_for_linux();
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jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR);
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#endif
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default:
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debug("Unsupported OS image.. Jumping nevertheless..\n");
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}
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#if defined(CONFIG_SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE)
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debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
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gd->malloc_ptr / 1024);
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#endif
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debug("loaded - jumping to U-Boot...");
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jump_to_image_no_args(&spl_image);
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}
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/*
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* This requires UART clocks to be enabled. In order for this to work the
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* caller must ensure that the gd pointer is valid.
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*/
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void preloader_console_init(void)
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{
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gd->bd = &bdata;
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gd->baudrate = CONFIG_BAUDRATE;
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serial_init(); /* serial communications setup */
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gd->have_console = 1;
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puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
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U_BOOT_TIME ")\n");
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#ifdef CONFIG_SPL_DISPLAY_PRINT
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spl_display_print();
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#endif
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}
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/**
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* spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution
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*
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* Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM
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* for the main board_init_r() execution. This is typically because we need
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* more stack space for things like the MMC sub-system.
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*
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* This function calculates the stack position, copies the global_data into
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* place and returns the new stack position. The caller is responsible for
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* setting up the sp register.
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*
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* @return new stack location, or 0 to use the same stack
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*/
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ulong spl_relocate_stack_gd(void)
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{
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#ifdef CONFIG_SPL_STACK_R
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gd_t *new_gd;
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ulong ptr;
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/* Get stack position: use 8-byte alignment for ABI compliance */
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ptr = CONFIG_SPL_STACK_R_ADDR - sizeof(gd_t);
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ptr &= ~7;
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new_gd = (gd_t *)ptr;
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memcpy(new_gd, (void *)gd, sizeof(gd_t));
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gd = new_gd;
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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return ptr;
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#else
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return 0;
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#endif
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}
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