78efae613b
The initial Vyasa-rk3288 TPL implementation is to reuse the
SPL_TEXT_BASE for TPL and SPL as 0x0 and 0xff704000 respectively.
But the below commit implements the reverse way of using TEXT_BASE's
like 0xff704000 for TPL and 0x0 for SPL and which indeed update
the SPL_TEXT_BASE for vyasa-rk3288 board.
"rockchip: Kconfig: enable TPL support for rk3328"
(sha1: 3f47db0275)
So, fix by dropping the legacy SPL_TEXT_BASE and it will
reassign 0x0 by default based on Kconfig definition.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
89 lines
2.2 KiB
Plaintext
89 lines
2.2 KiB
Plaintext
CONFIG_ARM=y
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# CONFIG_SPL_USE_ARCH_MEMCPY is not set
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# CONFIG_SPL_USE_ARCH_MEMSET is not set
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00100000
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CONFIG_ROCKCHIP_RK3288=y
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CONFIG_TARGET_VYASA_RK3288=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xff690000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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CONFIG_USE_PREBOOT=y
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CONFIG_SILENT_CONSOLE=y
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CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SPL_PARTITION_UUIDS=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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# CONFIG_SPL_SIMPLE_BUS is not set
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_PMIC_RK8XX=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_DWC2=y
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CONFIG_ROCKCHIP_USB2_PHY=y
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CONFIG_USB_KEYBOARD=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
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CONFIG_USB_GADGET_VENDOR_NUM=0x2207
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CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_USB_FUNCTION_MASS_STORAGE=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_DM_VIDEO=y
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CONFIG_DISPLAY=y
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CONFIG_VIDEO_ROCKCHIP=y
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CONFIG_DISPLAY_ROCKCHIP_HDMI=y
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CONFIG_CONSOLE_SCROLL_LINES=10
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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