Sean Anderson 2111f4e8bf riscv: k210: Use AI as the parent clock of aisram, not PLL1 ... Testing showed that disabling AI while leaving PLL1 enabled disabled the aisram. This suggests that AI is a more appropriate clock for that ram bank. Signed-off-by: Sean Anderson <seanga2@gmail.com>		2021-05-14 16:20:49 +08:00
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ae350_32.dts	riscv: dts: Add #address-cells and #size-cells in nor node	2019-12-10 08:23:10 +08:00
ae350_64.dts	riscv: dts: Add #address-cells and #size-cells in nor node	2019-12-10 08:23:10 +08:00
fu540-c000-u-boot.dtsi	riscv: fu540: dts: Correct reg size of clint node	2020-10-26 10:01:37 +08:00
fu540-c000.dtsi	riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux	2020-06-04 09:44:09 +08:00
fu540-hifive-unleashed-a00-ddr.dtsi	sifive: dts: fu540: Add DDR controller and phy register settings	2020-06-04 09:44:08 +08:00
hifive-unleashed-a00-u-boot.dtsi	riscv: Update SiFive device tree for new CLINT driver	2020-09-30 08:54:46 +08:00
hifive-unleashed-a00.dts	riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux	2020-06-04 09:44:09 +08:00
k210-maix-bit.dts	riscv: k210: Enable QSPI for spi3	2021-02-25 18:06:08 +08:00
k210.dtsi	riscv: k210: Use AI as the parent clock of aisram, not PLL1	2021-05-14 16:20:49 +08:00
Makefile	riscv: sifive: Rename fu540 board to unleashed	2021-04-08 15:37:29 +08:00
microchip-mpfs-icicle-kit-u-boot.dtsi	riscv: dts: Add device tree for Microchip Icicle Kit	2021-01-18 11:06:38 +08:00
microchip-mpfs-icicle-kit.dts	riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodes	2021-04-08 15:37:30 +08:00