u-boot/arch/mips/dts/qca956x.dtsi
Rosy Song 61290fb52c mips: add initial support for qca956x referenced board
QCA9563 is CPU used on AP152 board :

    Clock speed : 750 MHz ,
    Arch :  Mips 74Kc,
    Eth : SGMII interface,
    MIMO config : 3 * 3 450M,
    2 * USB 2.0,

Signed-off-by: Rosy Song <rosysong@rosinson.com>

Changes for v2:
   - coding style cleanup
   - remove ununsed flash chip in defconfig
   - enable automatic icache / dcache size in defconfig

Changes for v3:
   - add detailed information for qca956x in commit message

Changes for v4:
   - remove pre-configured network settings in ap152.h

Changes for v5:
   - coding style cleanup
2019-04-12 17:32:50 +02:00

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1.3 KiB
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Rosy Song <rosysong@rosinson.com>
*/
#include "skeleton.dtsi"
/ {
compatible = "qca,qca956x";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips74Kc";
reg = <0>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
xtal: xtal {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "xtal";
};
};
ahb {
compatible = "simple-bus";
ranges;
#address-cells = <1>;
#size-cells = <1>;
apb {
compatible = "simple-bus";
ranges;
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@18020000 {
compatible = "ns16550";
reg = <0x18020000 0x20>;
reg-shift = <2>;
status = "disabled";
};
gmac0: eth@0x19000000 {
compatible = "qca,ag956x-mac";
reg = <0x19000000 0x200>;
phy = <&phy0>;
phy-mode = "sgmii";
status = "disabled";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
};
spi0: spi@1f000000 {
compatible = "qca,ar7100-spi";
reg = <0x1f000000 0x10>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
};