5d9b166401
There is a second lpddr configuration with 2GB of RAM, but this requires different RAM timings, so in addition to adding the timing file, a separate defconfig is necessary. Signed-off-by: Adam Ford <aford173@gmail.com>
134 lines
3.3 KiB
Plaintext
134 lines
3.3 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_IMX8M=y
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CONFIG_SYS_TEXT_BASE=0x40200000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x10000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SYS_MEMTEST_START=0x40000000
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CONFIG_SYS_MEMTEST_END=0x44000000
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0xFFFFDE00
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_SPL_TEXT_BASE=0x912000
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CONFIG_TARGET_IMX8MN_BEACON=y
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CONFIG_IMX8MN_BEACON_2GB_LPDDR=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL=y
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CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
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CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
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CONFIG_FIT=y
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CONFIG_FIT_EXTERNAL_OFFSET=0x3000
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
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CONFIG_OF_SYSTEM_SETUP=y
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg"
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CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="u-boot=> "
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# CONFIG_BOOTM_NETBSD is not set
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# CONFIG_CMD_EXPORTENV is not set
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# CONFIG_CMD_IMPORTENV is not set
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CONFIG_CMD_ERASEENV=y
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# CONFIG_CMD_CRC32 is not set
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_CLK=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PART=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent interrupts"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=2
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CONFIG_SYS_MMC_ENV_PART=2
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_CLK_COMPOSITE_CCF=y
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CONFIG_CLK_COMPOSITE_CCF=y
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CONFIG_SPL_CLK_IMX8MN=y
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CONFIG_CLK_IMX8MN=y
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CONFIG_USB_FUNCTION_FASTBOOT=y
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CONFIG_FASTBOOT_BUF_ADDR=0x42800000
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CONFIG_FASTBOOT_BUF_SIZE=0x40000000
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=0
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CONFIG_MXC_GPIO=y
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CONFIG_DM_PCA953X=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MXC=y
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CONFIG_DM_MMC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_USDHC=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=40000000
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_DM_ETH=y
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CONFIG_PHY_GIGE=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_IMX8M=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_DM_PMIC_BD71837=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_BD71837=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_RESET=y
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CONFIG_DM_SERIAL=y
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# CONFIG_SPL_DM_SERIAL is not set
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CONFIG_MXC_UART=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_DM_THERMAL=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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# CONFIG_SPL_DM_USB is not set
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="FSL"
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CONFIG_USB_GADGET_VENDOR_NUM=0x0525
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CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
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CONFIG_CI_UDC=y
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CONFIG_SDP_LOADADDR=0x0
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CONFIG_OF_LIBFDT_OVERLAY=y
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