213 lines
5.9 KiB
C
213 lines
5.9 KiB
C
/*
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* (C) Copyright 2007
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* Stelian Pop <stelian.pop <at> leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91CAP9ADK board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define AT91C_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
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#define AT91C_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
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#define CFG_HZ 1000000 /* 1us resolution */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
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#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
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#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
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#define CONFIG_BAUDRATE 115200
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/*
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* Hardware drivers
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*/
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#define CONFIG_ATMEL_USART 1
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#undef CONFIG_USART2
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#define CONFIG_USART3 1 /* USART 3 is DBGU */
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock1 rw rootfstype=jffs2"
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/* #define CONFIG_ENV_OVERWRITE 1 */
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE 1
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#define CONFIG_BOOTP_BOOTPATH 1
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#define CONFIG_BOOTP_GATEWAY 1
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#define CONFIG_BOOTP_HOSTNAME 1
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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#define CONFIG_CMD_USB 1
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/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x70000000
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#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
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/* DataFlash */
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#define CONFIG_HAS_DATAFLASH 1
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#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
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#define CFG_MAX_DATAFLASH_BANKS 1
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#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_NEW_PARTITION 1
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/* NOR flash */
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#define CFG_FLASH_CFI 1
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#define CFG_FLASH_CFI_DRIVER 1
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#define PHYS_FLASH_1 0x10000000
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#define CFG_FLASH_BASE PHYS_FLASH_1
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#define CFG_MAX_FLASH_SECT 256
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#define CFG_MAX_FLASH_BANKS 1
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#define AT91C_FLASH_NWE_SETUP (4 << 0)
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#define AT91C_FLASH_NCS_WR_SETUP (2 << 8)
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#define AT91C_FLASH_NRD_SETUP (4 << 16)
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#define AT91C_FLASH_NCS_RD_SETUP (2 << 24)
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#define AT91C_FLASH_NWE_PULSE (8 << 0)
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#define AT91C_FLASH_NCS_WR_PULSE (10 << 8)
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#define AT91C_FLASH_NRD_PULSE (8 << 16)
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#define AT91C_FLASH_NCS_RD_PULSE (10 << 24)
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#define AT91C_FLASH_NWE_CYCLE (16 << 0)
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#define AT91C_FLASH_NRD_CYCLE (16 << 16)
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/* NAND flash */
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#define NAND_MAX_CHIPS 1
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#define CFG_MAX_NAND_DEVICE 1
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#define CFG_NAND_BASE 0x40000000
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#define AT91C_SM_NWE_SETUP (2 << 0)
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#define AT91C_SM_NCS_WR_SETUP (1 << 8)
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#define AT91C_SM_NRD_SETUP (2 << 16)
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#define AT91C_SM_NCS_RD_SETUP (1 << 24)
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#define AT91C_SM_NWE_PULSE (4 << 0)
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#define AT91C_SM_NCS_WR_PULSE (6 << 8)
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#define AT91C_SM_NRD_PULSE (4 << 16)
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#define AT91C_SM_NCS_RD_PULSE (6 << 24)
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#define AT91C_SM_NWE_CYCLE (8 << 0)
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#define AT91C_SM_NRD_CYCLE (8 << 16)
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#define AT91C_SM_TDF (1 << 16)
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/* Ethernet */
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#define CONFIG_MACB 1
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#define CONFIG_RMII 1
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#define CONFIG_NET_MULTI 1
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R 1
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/* USB */
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#define CONFIG_USB_OHCI_NEW 1
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#define LITTLEENDIAN 1
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#define CONFIG_DOS_PARTITION 1
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#define CFG_USB_OHCI_CPU_INIT 1
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#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91C_BASE_UHP */
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#define CFG_USB_OHCI_SLOT_NAME "at91cap9"
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#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
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#define CFG_LOAD_ADDR 0x72000000 /* load address */
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#define CFG_MEMTEST_START PHYS_SDRAM
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#define CFG_MEMTEST_END 0x73000000
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#define CFG_USE_DATAFLASH 1
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#undef CFG_USE_NORFLASH
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#ifdef CFG_USE_DATAFLASH
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/* bootstrap + u-boot + env + linux in dataflash */
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#define CFG_ENV_IS_IN_DATAFLASH 1
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#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
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#define CFG_ENV_OFFSET 0x4200
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#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
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#define CFG_ENV_SIZE 0x4200
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#define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x72000000 0x200040; bootm"
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#else
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/* bootstrap + u-boot + env + linux in norflash */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
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#define CFG_ENV_OFFSET 0x4000
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#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET)
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#define CFG_ENV_SIZE 0x4000
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#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
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#endif
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#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CFG_PROMPT "U-Boot> "
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#define CFG_CBSIZE 256
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#define CFG_MAXARGS 16
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#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
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#define CFG_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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