051a8ad7bb
Use different location for SPDX line. Also update dates for new mainline DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
117 lines
1.9 KiB
Plaintext
117 lines
1.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Xilinx CC108 board DTS
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*
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* (C) Copyright 2007-2018 Xilinx, Inc.
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* (C) Copyright 2007-2013 Michal Simek
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* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
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*
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* Michal SIMEK <monstr@monstr.eu>
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart0;
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spi0 = &qspi;
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};
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chosen {
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bootargs = "";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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};
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usb_phy0: phy0 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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usb_phy1: phy1 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@1 {
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reg = <1>;
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device_type = "ethernet-phy";
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};
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};
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&qspi {
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status = "okay";
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is-dual = <0>;
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num-cs = <1>;
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flash@0 { /* 16 MB */
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compatible = "n25q128a11";
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reg = <0x0>;
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "qspi-fsbl-uboot-bs";
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reg = <0x0 0x400000>; /* 4MB */
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};
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partition@400000 {
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label = "qspi-linux";
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reg = <0x400000 0x400000>; /* 4MB */
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};
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partition@800000 {
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label = "qspi-rootfs";
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reg = <0x800000 0x400000>; /* 4MB */
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};
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partition@c00000 {
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label = "qspi-devicetree";
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reg = <0xc00000 0x100000>; /* 1MB */
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};
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partition@d00000 {
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label = "qspi-scratch";
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reg = <0xd00000 0x200000>; /* 2MB */
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};
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partition@f00000 {
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label = "qspi-uboot-env";
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reg = <0xf00000 0x100000>; /* 1MB */
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};
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};
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};
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&sdhci1 {
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status = "okay";
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broken-cd ;
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wp-inverted ;
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};
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&uart0 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy0>;
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};
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&usb1 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy1>;
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};
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