dd43272be1
Correct the description of the ESR register. Fix a typo. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
125 lines
4.7 KiB
ReStructuredText
125 lines
4.7 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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.. Copyright (c) 2020 Heinrich Schuchardt
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Analyzing crash dumps
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=====================
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When the CPU detects an instruction that it cannot execute it raises an
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interrupt. U-Boot then writes a crash dump. This chapter describes how such
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dump can be analyzed.
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Creating a crash dump voluntarily
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---------------------------------
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For describing the analysis of a crash dump we need an example. U-Boot comes
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with a command 'exception' that comes in handy here. The command is enabled
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by::
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CONFIG_CMD_EXCEPTION=y
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The example output below was recorded when running qemu\_arm64\_defconfig on
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QEMU::
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=> exception undefined
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"Synchronous Abort" handler, esr 0x02000000
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elr: 00000000000101fc lr : 00000000000214ec (reloc)
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elr: 000000007ff291fc lr : 000000007ff3a4ec
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x0 : 000000007ffbd7f8 x1 : 0000000000000000
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x2 : 0000000000000001 x3 : 000000007eedce18
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x4 : 000000007ff291fc x5 : 000000007eedce50
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x6 : 0000000000000064 x7 : 000000007eedce10
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x8 : 0000000000000000 x9 : 0000000000000004
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x10: 6db6db6db6db6db7 x11: 000000000000000d
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x12: 0000000000000006 x13: 000000000001869f
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x14: 000000007edd7dc0 x15: 0000000000000002
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x16: 000000007ff291fc x17: 0000000000000000
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x18: 000000007eed8dc0 x19: 0000000000000000
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x20: 000000007ffbd7f8 x21: 0000000000000000
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x22: 000000007eedce10 x23: 0000000000000002
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x24: 000000007ffd4c80 x25: 0000000000000000
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x26: 0000000000000000 x27: 0000000000000000
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x28: 000000007eedce70 x29: 000000007edd7b40
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Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)
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Resetting CPU ...
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resetting ...
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The first line provides us with the type of interrupt that occurred.
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On ARMv8 a synchronous abort is an exception thrown when hitting an unallocated
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instruction. The exception syndrome register ESR register contains information
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describing the reason for the exception. Bit 25 set here indicates that a 32 bit
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instruction led to the exception.
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The second line provides the contents of the elr and the lr register after
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subtracting the relocation offset. - U-Boot relocates itself after being
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loaded. - The relocation offset can also be displayed using the bdinfo command.
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After the contents of the registers we get a line indicating the machine
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code of the instructions preceding the crash and in parentheses the instruction
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leading to the dump.
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Analyzing the code location
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---------------------------
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We can convert the instructions in the line starting with 'Code:' into mnemonics
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using the objdump command. To make things easier scripts/decodecode is
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supplied::
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$echo 'Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)' | \
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CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 scripts/decodecode
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Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)
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All code
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========
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0: b00003c0 adrp x0, 0x79000
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4: 912ad000 add x0, x0, #0xab4
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8: 940029d6 bl 0xa760
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c: 17ffff52 b 0xfffffffffffffd54
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10:* e7f7defb .inst 0xe7f7defb ; undefined <-- trapping instruction
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Code starting with the faulting instruction
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===========================================
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0: e7f7defb .inst 0xe7f7defb ; undefined
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Now lets use the locations provided by the elr and lr registers after
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subtracting the relocation offset to find out where in the code the crash
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occurred and from where it was invoked.
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File u-boot.map contains the memory layout of the U-Boot binary. Here we find
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these lines::
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.text.do_undefined
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0x00000000000101fc 0xc cmd/built-in.o
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.text.exception_complete
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0x0000000000010208 0x90 cmd/built-in.o
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...
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.text.cmd_process
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0x00000000000213b8 0x164 common/built-in.o
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0x00000000000213b8 cmd_process
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.text.cmd_process_error
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0x000000000002151c 0x40 common/built-in.o
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0x000000000002151c cmd_process_error
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So the error occurred at the start of function do\_undefined() and this
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function was invoked from somewhere inside function cmd\_process().
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If we want to dive deeper, we can disassemble the U-Boot binary::
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$ aarch64-linux-gnu-objdump -S -D u-boot | less
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00000000000101fc <do_undefined>:
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{
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/*
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* 0xe7f...f. is undefined in ARM mode
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* 0xde.. is undefined in Thumb mode
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*/
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asm volatile (".word 0xe7f7defb\n");
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101fc: e7f7defb .inst 0xe7f7defb ; undefined
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return CMD_RET_FAILURE;
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}
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10200: 52800020 mov w0, #0x1 // #1
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10204: d65f03c0 ret
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This example is based on the ARMv8 architecture but the same procedures can be
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used on other architectures as well.
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