104950a7fe
This bus controller is used to communicate with an X-Powers AXP PMIC. Currently, various drivers access PMIC registers through a platform- specific non-DM "pmic_bus" interface, which depends on the legacy I2C framework. In order to convert those drivers to use DM_PMIC, this bus needs a DM_I2C driver. Refactor the p2wi functions to take the base address as a parameter, and implement both the existing interface (which is still needed in SPL) and the DM_I2C interface on top of them. The register for switching between I2C/P2WI/RSB mode is the same across all PMIC variants. Move that to the common header, so it can be used by both interface implementations. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
131 lines
2.9 KiB
C
131 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
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*
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* Sunxi PMIC bus access helpers
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*
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* The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
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* axp223 uses the rsb bus, these functions abstract this.
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*/
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#include <axp_pmic.h>
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#include <common.h>
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#include <asm/arch/p2wi.h>
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#include <asm/arch/rsb.h>
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#include <i2c.h>
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#include <asm/arch/pmic_bus.h>
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#define AXP152_I2C_ADDR 0x30
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#define AXP209_I2C_ADDR 0x34
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#define AXP305_I2C_ADDR 0x36
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#define AXP221_CHIP_ADDR 0x68
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/* AXP818 device and runtime addresses are same as AXP223 */
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#define AXP223_DEVICE_ADDR 0x3a3
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#define AXP223_RUNTIME_ADDR 0x2d
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int pmic_bus_init(void)
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{
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/* This cannot be 0 because it is used in SPL before BSS is ready */
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static int needs_init = 1;
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__maybe_unused int ret;
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if (!needs_init)
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return 0;
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#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
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# ifdef CONFIG_MACH_SUN6I
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p2wi_init();
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ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP_PMIC_MODE_REG,
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AXP_PMIC_MODE_P2WI);
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# elif defined CONFIG_MACH_SUN8I_R40
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/* Nothing. R40 uses the AXP221s in I2C mode */
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ret = 0;
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# else
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ret = rsb_init();
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if (ret)
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return ret;
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ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR);
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# endif
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if (ret)
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return ret;
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#endif
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needs_init = 0;
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return 0;
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}
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int pmic_bus_read(u8 reg, u8 *data)
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{
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#ifdef CONFIG_AXP152_POWER
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return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1);
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#elif defined CONFIG_AXP209_POWER
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return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
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#elif defined CONFIG_AXP305_POWER
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return i2c_read(AXP305_I2C_ADDR, reg, 1, data, 1);
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#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
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# ifdef CONFIG_MACH_SUN6I
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return p2wi_read(reg, data);
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# elif defined CONFIG_MACH_SUN8I_R40
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return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
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# else
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return rsb_read(AXP223_RUNTIME_ADDR, reg, data);
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# endif
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#endif
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}
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int pmic_bus_write(u8 reg, u8 data)
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{
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#ifdef CONFIG_AXP152_POWER
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return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1);
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#elif defined CONFIG_AXP209_POWER
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return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
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#elif defined CONFIG_AXP305_POWER
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return i2c_write(AXP305_I2C_ADDR, reg, 1, &data, 1);
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#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
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# ifdef CONFIG_MACH_SUN6I
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return p2wi_write(reg, data);
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# elif defined CONFIG_MACH_SUN8I_R40
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return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
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# else
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return rsb_write(AXP223_RUNTIME_ADDR, reg, data);
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# endif
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#endif
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}
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int pmic_bus_setbits(u8 reg, u8 bits)
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{
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int ret;
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u8 val;
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ret = pmic_bus_read(reg, &val);
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if (ret)
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return ret;
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if ((val & bits) == bits)
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return 0;
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val |= bits;
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return pmic_bus_write(reg, val);
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}
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int pmic_bus_clrbits(u8 reg, u8 bits)
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{
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int ret;
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u8 val;
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ret = pmic_bus_read(reg, &val);
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if (ret)
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return ret;
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if (!(val & bits))
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return 0;
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val &= ~bits;
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return pmic_bus_write(reg, val);
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}
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