u-boot/arch
Suman Anna 1045ff4d1a ARM: DRA7: Fixup DSP OPP_HIGH clock rate on DRA76P/DRA77P SoCs
The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") added the core logic to update the kernel
device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on
a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx
family of SoCs.

The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though
provide a higher performance and can run at a higher clock frequency
of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the
correct clock rates on these SoCs. Note that this higher clock rate is
not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or
AM574x SoCs) that follow the ABZ package.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-12-09 14:00:24 -05:00
..
arc common: Move enable/disable_interrupts out of common.h 2019-12-02 18:25:01 -05:00
arm ARM: DRA7: Fixup DSP OPP_HIGH clock rate on DRA76P/DRA77P SoCs 2019-12-09 14:00:24 -05:00
m68k common: Move trap_init() out of common.h 2019-12-02 18:25:25 -05:00
microblaze common: Move enable/disable_interrupts out of common.h 2019-12-02 18:25:01 -05:00
mips Merge branch '2019-12-02-master-imports' 2019-12-02 22:05:35 -05:00
nds32 common: Move enable/disable_interrupts out of common.h 2019-12-02 18:25:01 -05:00
nios2 common: Move enable/disable_interrupts out of common.h 2019-12-02 18:25:01 -05:00
powerpc common: Move some board functions out of common.h 2019-12-02 18:25:21 -05:00
riscv common: Move board_get_usable_ram_top() out of common.h 2019-12-02 18:25:04 -05:00
sandbox common: Move command functions out of common.h 2019-12-02 18:25:02 -05:00
sh common: Move enable/disable_interrupts out of common.h 2019-12-02 18:25:01 -05:00
x86 x86: simplify ljmp to 32-bit code 2019-12-08 19:10:21 +08:00
xtensa common: Move interrupt functions into a new header 2019-12-02 18:25:00 -05:00
.gitignore
Kconfig sh: r2dplus: Enable OF control 2019-09-02 17:38:43 +02:00