8abebe3ead
ilog2 is required by AHCI driver Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
390 lines
9.5 KiB
C
390 lines
9.5 KiB
C
#ifndef _I386_BITOPS_H
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#define _I386_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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*/
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/*
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* These have to be done with inline assembly: that way the bit-setting
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* is guaranteed to be atomic. All bit operations return 0 if the bit
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* was cleared before the operation and != 0 if it was not.
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*
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*/
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#ifdef CONFIG_SMP
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#define LOCK_PREFIX "lock ; "
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#else
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#define LOCK_PREFIX ""
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#endif
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#define ADDR (*(volatile long *) addr)
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/**
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This function is atomic and may not be reordered. See __set_bit()
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* if you do not require the atomic guarantees.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __inline__ void set_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btsl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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/**
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* __set_bit - Set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike set_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static __inline__ void __set_bit(int nr, volatile void * addr)
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{
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__asm__(
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"btsl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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/**
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* clear_bit() is atomic and may not be reordered. However, it does
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* not contain a memory barrier, so if it is used for locking purposes,
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* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
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* in order to ensure changes are visible on other processors.
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*/
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static __inline__ void clear_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btrl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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/**
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* __change_bit - Toggle a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike change_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static __inline__ void __change_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__(
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"btcl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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/**
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* change_bit - Toggle a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* change_bit() is atomic and may not be reordered.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __inline__ void change_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btcl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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/**
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* test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_set_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__( LOCK_PREFIX
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"btsl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr) : "memory");
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return oldbit;
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}
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/**
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* __test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__(
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"btsl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr));
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return oldbit;
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}
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__( LOCK_PREFIX
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"btrl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr) : "memory");
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return oldbit;
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}
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/**
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* __test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__(
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"btrl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr));
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return oldbit;
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}
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/* WARNING: non atomic and it can be reordered! */
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static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__(
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"btcl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr) : "memory");
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return oldbit;
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}
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/**
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* test_and_change_bit - Change a bit and return its new value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_change_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__( LOCK_PREFIX
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"btcl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr) : "memory");
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return oldbit;
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}
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#if 0 /* Fool kernel-doc since it doesn't do macros yet */
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/**
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* test_bit - Determine whether a bit is set
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static int test_bit(int nr, const volatile void * addr);
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#endif
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static __inline__ int constant_test_bit(int nr, const volatile void * addr)
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{
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return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline__ int variable_test_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__(
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"btl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit)
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:"m" (ADDR),"Ir" (nr));
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return oldbit;
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}
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#define test_bit(nr,addr) \
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(__builtin_constant_p(nr) ? \
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constant_test_bit((nr),(addr)) : \
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variable_test_bit((nr),(addr)))
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/**
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* find_first_zero_bit - find the first zero bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first zero bit, not the number of the byte
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* containing a bit.
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*/
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static __inline__ int find_first_zero_bit(void * addr, unsigned size)
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{
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int d0, d1, d2;
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int res;
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if (!size)
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return 0;
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/* This looks at memory. Mark it volatile to tell gcc not to move it around */
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__asm__ __volatile__(
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"movl $-1,%%eax\n\t"
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"xorl %%edx,%%edx\n\t"
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"repe; scasl\n\t"
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"je 1f\n\t"
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"xorl -4(%%edi),%%eax\n\t"
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"subl $4,%%edi\n\t"
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"bsfl %%eax,%%edx\n"
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"1:\tsubl %%ebx,%%edi\n\t"
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"shll $3,%%edi\n\t"
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"addl %%edi,%%edx"
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:"=d" (res), "=&c" (d0), "=&D" (d1), "=&a" (d2)
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:"1" ((size + 31) >> 5), "2" (addr), "b" (addr));
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return res;
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}
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/**
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* find_next_zero_bit - find the first zero bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*/
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static __inline__ int find_next_zero_bit (void * addr, int size, int offset)
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{
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unsigned long * p = ((unsigned long *) addr) + (offset >> 5);
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int set = 0, bit = offset & 31, res;
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if (bit) {
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/*
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* Look for zero in first byte
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*/
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__asm__("bsfl %1,%0\n\t"
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"jne 1f\n\t"
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"movl $32, %0\n"
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"1:"
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: "=r" (set)
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: "r" (~(*p >> bit)));
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if (set < (32 - bit))
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return set + offset;
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set = 32 - bit;
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p++;
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}
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/*
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* No zero yet, search remaining full bytes for a zero
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*/
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res = find_first_zero_bit (p, size - 32 * (p - (unsigned long *) addr));
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return (offset + set + res);
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}
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/**
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* ffz - find first zero in word.
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* @word: The word to search
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*
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* Undefined if no zero exists, so code should check against ~0UL first.
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*/
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static __inline__ unsigned long ffz(unsigned long word)
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{
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__asm__("bsfl %1,%0"
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:"=r" (word)
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:"r" (~word));
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return word;
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}
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#ifdef __KERNEL__
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/**
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* ffs - find first bit set
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* @x: the word to search
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*
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* This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(int x)
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{
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int r;
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__asm__("bsfl %1,%0\n\t"
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"jnz 1f\n\t"
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"movl $-1,%0\n"
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"1:" : "=r" (r) : "g" (x));
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return r+1;
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}
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#define PLATFORM_FFS
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static inline int __ilog2(unsigned int x)
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{
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return generic_fls(x) - 1;
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}
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/**
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* hweightN - returns the hamming weight of a N-bit word
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* @x: the word to weigh
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*
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* The Hamming Weight of a number is the total number of bits set in it.
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*/
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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#endif /* __KERNEL__ */
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#ifdef __KERNEL__
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#define ext2_set_bit __test_and_set_bit
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#define ext2_clear_bit __test_and_clear_bit
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#define ext2_test_bit test_bit
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#define ext2_find_first_zero_bit find_first_zero_bit
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#define ext2_find_next_zero_bit find_next_zero_bit
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/* Bitmap functions for the minix filesystem. */
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#define minix_test_and_set_bit(nr,addr) __test_and_set_bit(nr,addr)
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#define minix_set_bit(nr,addr) __set_bit(nr,addr)
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#define minix_test_and_clear_bit(nr,addr) __test_and_clear_bit(nr,addr)
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#define minix_test_bit(nr,addr) test_bit(nr,addr)
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#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
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#endif /* __KERNEL__ */
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#endif /* _I386_BITOPS_H */
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