origen
|
Origen: Select SCLKMPLL as FIMD0 parent clock
|
2012-02-12 10:11:29 +01:00 |
smdk2410
|
punt unused clean/distclean targets
|
2011-10-15 22:20:36 +02:00 |
smdk5250
|
EXYNOS: SMDK5250: Support all 4 UARTs
|
2012-03-27 22:08:28 +02:00 |
smdk6400
|
punt unused clean/distclean targets
|
2011-10-15 22:20:36 +02:00 |
smdkc100
|
punt unused clean/distclean targets
|
2011-10-15 22:20:36 +02:00 |
smdkv310
|
S5PC2XX: Rename S5pc2XX to exynos
|
2011-12-09 17:30:09 +01:00 |
trats
|
TRATS: set gpio of UART correctly
|
2012-02-12 10:11:29 +01:00 |