429 lines
14 KiB
C
429 lines
14 KiB
C
/*
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* (C) Copyright 2002-2005
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* Gary Jennejohn <gj@denx.de>
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*
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* Configuation settings for the TRAB board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* Default configuration is with 8 MB Flash, 32 MB RAM
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*/
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#if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
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# define CONFIG_FLASH_8MB /* 8 MB Flash */
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#endif
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#if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
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# define CONFIG_RAM_32MB /* 32 MB SDRAM */
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#endif
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
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#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
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#define CONFIG_TRAB 1 /* on a TRAB Board */
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#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
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#define LITTLEENDIAN 1 /* used by usb_ohci.c */
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/* automatic software updates (see board/trab/auto_update.c) */
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#define CONFIG_AUTO_UPDATE 1
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/* input clock of PLL */
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#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CFG_DEVICE_NULLDEV 1 /* enble null device */
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#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
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#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
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/***********************************************************
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* I2C stuff:
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* the TRAB is equipped with an ATMEL 24C04 EEPROM at
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* address 0x54 with 8bit addressing
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***********************************************************/
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#define CFG_I2C_SPEED 100000 /* I2C speed */
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#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
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#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
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#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
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#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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/* USB stuff */
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#define CONFIG_USB_OHCI_NEW 1
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_DOS_PARTITION 1
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#undef CFG_USB_OHCI_BOARD_INIT
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#define CFG_USB_OHCI_CPU_INIT 1
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#define CFG_USB_OHCI_REGS_BASE 0x14200000
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#define CFG_USB_OHCI_SLOT_NAME "s3c2400"
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#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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/*
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* Hardware drivers
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*/
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#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
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#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
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#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
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#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
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#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
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#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
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/*
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* select serial console configuration
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*/
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
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#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
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#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
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#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
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/*
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* The following enables modem debugging stuff. The dbg() and
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* 'char screen[1024]' are used for debug printfs. Unfortunately,
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* it is usable only from BDI
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*/
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#undef CONFIG_MODEM_SUPPORT_DEBUG
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
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/* Use s3c2400's RTC */
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#define CONFIG_RTC_S3C24X0 1
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_BSP
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_SNTP
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#define CONFIG_CMD_USB
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#ifdef CONFIG_HWFLOW
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#define CONFIG_CMD_HWFLOW
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#endif
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#ifdef CONFIG_VFD
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#define CONFIG_CMD_VFD
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#endif
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#ifdef CONFIG_DRIVER_S3C24X0_I2C
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_I2C
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#endif
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#ifndef USE_920T_MMU
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#undef CONFIG_CMD_CACHE
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#endif
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/* moved up */
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#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
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#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
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#define CONFIG_BOOTARGS "console=ttyS0"
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#define CONFIG_NETMASK 255.255.0.0
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#define CONFIG_IPADDR 192.168.3.68
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#define CONFIG_HOSTNAME trab
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#define CONFIG_SERVERIP 192.168.3.1
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#define CONFIG_BOOTCOMMAND "burn_in"
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#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
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#ifdef CFG_HUSH_PARSER
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"nfs_args=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$serverip:$rootpath\0" \
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"rootpath=/opt/eldk/arm_920TDI\0" \
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"ram_args=setenv bootargs root=/dev/ram rw\0" \
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"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
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"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
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"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
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"load=tftp C100000 ${u-boot}\0" \
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"update=protect off 0 5FFFF;era 0 5FFFF;" \
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"cp.b C100000 0 $filesize\0" \
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"loadfile=/tftpboot/TRAB/uImage\0" \
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"loadaddr=c400000\0" \
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"net_load=tftpboot $loadaddr $loadfile\0" \
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"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
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"kernel_addr=00060000\0" \
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"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
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"mdm_init1=ATZ\0" \
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"mdm_init2=ATS0=1\0" \
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"mdm_flow_control=rts/cts\0"
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#else /* !CFG_HUSH_PARSER */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"nfs_args=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"rootpath=/opt/eldk/arm_920TDI\0" \
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"ram_args=setenv bootargs root=/dev/ram rw\0" \
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"add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
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"add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
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"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
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"load=tftp C100000 ${u-boot}\0" \
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"update=protect off 0 5FFFF;era 0 5FFFF;" \
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"cp.b C100000 0 ${filesize}\0" \
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"loadfile=/tftpboot/TRAB/uImage\0" \
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"loadaddr=c400000\0" \
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"net_load=tftpboot ${loadaddr} ${loadfile}\0" \
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"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
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"kernel_addr=000C0000\0" \
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"flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
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"mdm_init1=ATZ\0" \
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"mdm_init2=ATS0=1\0" \
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"mdm_flow_control=rts/cts\0"
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#endif /* CFG_HUSH_PARSER */
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#else /* CONFIG_FLASH_8MB => 8 MB flash */
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#ifdef CFG_HUSH_PARSER
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"nfs_args=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$serverip:$rootpath\0" \
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"rootpath=/opt/eldk/arm_920TDI\0" \
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"ram_args=setenv bootargs root=/dev/ram rw\0" \
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"add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
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"add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
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"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
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"load=tftp C100000 ${u-boot}\0" \
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"update=protect off 0 3FFFF;era 0 3FFFF;" \
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"cp.b C100000 0 $filesize;" \
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"setenv filesize;saveenv\0" \
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"loadfile=/tftpboot/TRAB/uImage\0" \
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"loadaddr=C400000\0" \
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"net_load=tftpboot $loadaddr $loadfile\0" \
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"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
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"kernel_addr=000C0000\0" \
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"flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
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"mdm_init1=ATZ\0" \
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"mdm_init2=ATS0=1\0" \
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"mdm_flow_control=rts/cts\0"
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#else /* !CFG_HUSH_PARSER */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"nfs_args=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"rootpath=/opt/eldk/arm_920TDI\0" \
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"ram_args=setenv bootargs root=/dev/ram rw\0" \
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"add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
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"add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
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"u-boot=/tftpboot/TRAB/u-boot.bin\0" \
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"load=tftp C100000 ${u-boot}\0" \
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"update=protect off 0 3FFFF;era 0 3FFFF;" \
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"cp.b C100000 0 ${filesize};" \
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"setenv filesize;saveenv\0" \
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"loadfile=/tftpboot/TRAB/uImage\0" \
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"loadaddr=C400000\0" \
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"net_load=tftpboot ${loadaddr} ${loadfile}\0" \
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"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
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"kernel_addr=000C0000\0" \
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"flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
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"mdm_init1=ATZ\0" \
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"mdm_init2=ATS0=1\0" \
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"mdm_flow_control=rts/cts\0"
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#endif /* CFG_HUSH_PARSER */
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#endif /* CONFIG_FLASH_8MB */
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#if 1 /* feel free to disable for development */
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#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
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#define CONFIG_AUTOBOOT_PROMPT \
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"\nEnter password - autoboot in %d sec...\n", bootdelay
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#define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
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#endif
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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/* what's this ? it's not used anywhere */
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
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#ifdef CFG_HUSH_PARSER
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#define CFG_PROMPT_HUSH_PS2 "> "
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#endif
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
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#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
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#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
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#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
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#ifdef CONFIG_TRAB_50MHZ
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/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
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/* it to wrap 100 times (total 1562500) to get 1 sec. */
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/* this should _really_ be calculated !! */
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#define CFG_HZ 1562500
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#else
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/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
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/* it to wrap 100 times (total 1039000) to get 1 sec. */
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/* this should _really_ be calculated !! */
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#define CFG_HZ 1039000
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#endif
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/* valid baudrates */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
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/*-----------------------------------------------------------------------
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* burn-in test stuff.
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*
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* BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
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* Because the burn-in test itself causes also an delay of about 4 seconds,
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* this time must be subtracted from the desired overall burn-in cycle time.
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*/
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#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
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#ifndef CONFIG_RAM_16MB
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#else
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#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
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#endif
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#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
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/* The following #defines are needed to get flash environment right */
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#define CFG_MONITOR_BASE CFG_FLASH_BASE
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#define CFG_MONITOR_LEN (256 << 10)
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/* Dynamic MTD partition support */
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#define CONFIG_JFFS2_CMDLINE
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#define MTDIDS_DEFAULT "nor0=0"
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/* production flash layout */
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#define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
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"16k(Env1)," \
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"16k(Env2)," \
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"336k(Firmware2)ro," \
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"896k(Kernel)," \
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"5376k(Root-FS)," \
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"1408k(JFFS2)," \
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"-(VFD)"
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#ifndef CONFIG_FLASH_8MB
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#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
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#else
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#endif
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/* timeout values are in ticks */
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#define CFG_FLASH_ERASE_TOUT (15*CFG_HZ) /* Timeout for Flash Erase */
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#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
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#define CFG_ENV_IS_IN_FLASH 1
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/* Address and size of Primary Environment Sector */
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#ifndef CONFIG_FLASH_8MB
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
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#define CFG_ENV_SIZE 0x4000
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#define CFG_ENV_SECT_SIZE 0x20000
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#else
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
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#define CFG_ENV_SIZE 0x4000
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#define CFG_ENV_SECT_SIZE 0x4000
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#endif
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/* Address and size of Redundant Environment Sector */
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#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
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#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
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/* Initial value of the on-board touch screen brightness */
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#define CFG_BRIGHTNESS 0x20
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#endif /* __CONFIG_H */
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