203 lines
5.8 KiB
C
203 lines
5.8 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9261EK board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define AT91_CPU_NAME "AT91SAM9261"
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#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
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#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
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#define CFG_HZ 1000000 /* 1us resolution */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
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#define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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/*
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* Hardware drivers
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*/
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#define CONFIG_ATMEL_USART 1
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#undef CONFIG_USART2
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#define CONFIG_USART3 1 /* USART 3 is DBGU */
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/* LCD */
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#define CONFIG_LCD 1
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#define LCD_BPP LCD_COLOR8
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#define CONFIG_LCD_LOGO 1
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO 1
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#define CONFIG_LCD_INFO_BELOW_LOGO 1
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#define CFG_WHITE_ON_BLACK 1
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#define CONFIG_ATMEL_LCD 1
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#define CONFIG_ATMEL_LCD_BGR555 1
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#define CFG_CONSOLE_IS_IN_ENV 1
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE 1
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#define CONFIG_BOOTP_BOOTPATH 1
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#define CONFIG_BOOTP_GATEWAY 1
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#define CONFIG_BOOTP_HOSTNAME 1
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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#define CONFIG_CMD_USB 1
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
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/* DataFlash */
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#define CONFIG_HAS_DATAFLASH 1
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#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
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#define CFG_MAX_DATAFLASH_BANKS 2
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#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
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#define AT91_SPI_CLK 15000000
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#define DATAFLASH_TCSS (0x1a << 16)
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#define DATAFLASH_TCHS (0x1 << 24)
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/* NAND flash */
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#define NAND_MAX_CHIPS 1
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#define CFG_MAX_NAND_DEVICE 1
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#define CFG_NAND_BASE 0x40000000
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#define CFG_NAND_DBW_8 1
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/* NOR flash - no real flash on this board */
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#define CFG_NO_FLASH 1
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/* Ethernet */
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DM9000_BASE 0x30000000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
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#define CONFIG_DM9000_USE_16BIT 1
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R 1
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/* USB */
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#define CONFIG_USB_OHCI_NEW 1
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#define LITTLEENDIAN 1
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#define CONFIG_DOS_PARTITION 1
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#define CFG_USB_OHCI_CPU_INIT 1
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#define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
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#define CFG_USB_OHCI_SLOT_NAME "at91sam9261"
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#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE 1
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#define CFG_LOAD_ADDR 0x22000000 /* load address */
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#define CFG_MEMTEST_START PHYS_SDRAM
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#define CFG_MEMTEST_END 0x23e00000
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#define CFG_USE_DATAFLASH_CS0 1
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#undef CFG_USE_NANDFLASH
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#ifdef CFG_USE_DATAFLASH_CS0
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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#define CONFIG_ENV_IS_IN_DATAFLASH 1
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#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
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#define CFG_ENV_OFFSET 0x4200
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#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
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#define CFG_ENV_SIZE 0x4200
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#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock0 " \
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"mtdparts=at91_nand:-(root) " \
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"rw rootfstype=jffs2"
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#else /* CFG_USE_NANDFLASH */
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CFG_ENV_OFFSET 0x60000
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#define CFG_ENV_OFFSET_REDUND 0x80000
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#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock5 " \
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"mtdparts=at91_nand:128k(bootstrap)ro," \
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"256k(uboot)ro,128k(env1)ro," \
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"128k(env2)ro,2M(linux),-(root) " \
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"rw rootfstype=jffs2"
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CFG_PROMPT "U-Boot> "
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#define CFG_CBSIZE 256
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#define CFG_MAXARGS 16
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#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
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#define CFG_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
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#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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