4db386655a
Perform a simple rename of CONFIG_MXC_UART_BASE to CFG_MXC_UART_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Based on vendor support provided by AVNET Embedded
|
|
*
|
|
* Copyright (C) 2021 AVNET Embedded, MSC Technologies GmbH
|
|
* Copyright 2021 General Electric Company
|
|
* Copyright 2021 Collabora Ltd.
|
|
*/
|
|
|
|
#ifndef __MSC_SM2S_IMX8MP_H
|
|
#define __MSC_SM2S_IMX8MP_H
|
|
|
|
#include <linux/sizes.h>
|
|
#include <linux/stringify.h>
|
|
#include <asm/arch/imx-regs.h>
|
|
|
|
#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
|
|
|
|
#if defined(CONFIG_CMD_NET)
|
|
#define CFG_FEC_MXC_PHYADDR 1
|
|
#define PHY_ANEG_TIMEOUT 20000
|
|
#endif
|
|
|
|
#ifndef CONFIG_SPL_BUILD
|
|
#define BOOT_TARGET_DEVICES(func) \
|
|
func(MMC, mmc, 1) \
|
|
func(MMC, mmc, 2)
|
|
|
|
#include <config_distro_bootcmd.h>
|
|
#endif
|
|
|
|
/* Initial environment variables */
|
|
#define CFG_EXTRA_ENV_SETTINGS \
|
|
BOOTENV \
|
|
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
|
|
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
|
|
"image=Image\0" \
|
|
"console=ttymxc1,115200\0" \
|
|
"fdt_addr_r=0x43000000\0" \
|
|
"boot_fdt=try\0" \
|
|
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
|
"initrd_addr=0x43800000\0" \
|
|
"bootm_size=0x10000000\0" \
|
|
"mmcpart=1\0" \
|
|
"mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
|
|
|
|
/* Link Definitions */
|
|
|
|
#define CFG_SYS_INIT_RAM_ADDR 0x40000000
|
|
#define CFG_SYS_INIT_RAM_SIZE 0x80000
|
|
|
|
#define CFG_SYS_SDRAM_BASE 0x40000000
|
|
#define PHYS_SDRAM 0x40000000
|
|
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
|
|
#define PHYS_SDRAM_2 0xc0000000
|
|
#define PHYS_SDRAM_2_SIZE 0x0
|
|
|
|
#define CFG_MXC_UART_BASE UART2_BASE_ADDR
|
|
|
|
#define CFG_SYS_FSL_USDHC_NUM 2
|
|
#define CFG_SYS_FSL_ESDHC_ADDR 0
|
|
|
|
#endif
|