8a897c4f97
Perform a simple rename of CONFIG_MAX_RAM_BANK_SIZE to CFG_MAX_RAM_BANK_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
91 lines
2.5 KiB
C
91 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 David Lechner <david@lechnology.com>
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*
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* Based on da850evm.h
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on davinci_dvevm.h. Original Copyrights follow:
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*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* SoC Configuration
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*/
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#define CFG_SYS_EXCEPTION_VECTORS_HIGH
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#define CFG_SYS_OSCIN_FREQ 24000000
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#define CFG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
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#define CFG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
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/*
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* Memory Info
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*/
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#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
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#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
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#define CFG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
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/* memtest start addr */
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/* memtest will be run on 16MB */
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/*
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* Serial Driver info
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*/
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#define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
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#define CFG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID)
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/*
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* U-Boot general configuration
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*/
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/*
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* Linux Information
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*/
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#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
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#define CFG_EXTRA_ENV_SETTINGS \
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"bootenvfile=uEnv.txt\0" \
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"fdtfile=da850-lego-ev3.dtb\0" \
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"memsize=64M\0" \
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"filesyssize=10M\0" \
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"verify=n\0" \
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"console=ttyS1,115200n8\0" \
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"bootscraddr=0xC0600000\0" \
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"fdtaddr=0xC0600000\0" \
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"loadaddr=0xC0007FC0\0" \
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"filesysaddr=0xC1180000\0" \
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"fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \
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"importbootenv=echo Importing environment...; " \
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"env import -t ${loadaddr} ${filesize}\0" \
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"loadbootenv=fatload mmc 0 ${loadaddr} ${bootenvfile}\0" \
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"mmcargs=setenv bootargs console=${console} root=/dev/mmcblk0p2 rw " \
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"rootwait ${optargs}\0" \
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"mmcboot=bootm ${loadaddr}\0" \
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"flashargs=setenv bootargs initrd=${filesysaddr},${filesyssize} " \
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"root=/dev/ram0 rw rootfstype=squashfs console=${console} " \
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"${optargs}\0" \
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"flashboot=sf probe 0; " \
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"sf read ${fdtaddr} 0x40000 0x10000; " \
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"sf read ${loadaddr} 0x50000 0x400000; " \
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"sf read ${filesysaddr} 0x450000 0xA00000; " \
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"run fdtfixup; " \
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"run fdtboot\0" \
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"loadimage=fatload mmc 0 ${loadaddr} uImage\0" \
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"loadfdt=fatload mmc 0 ${fdtaddr} ${fdtfile}\0" \
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"fdtfixup=fdt addr ${fdtaddr}; fdt resize; fdt chosen\0" \
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"fdtboot=bootm ${loadaddr} - ${fdtaddr}\0" \
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"loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
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"bootscript=source ${bootscraddr}\0"
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/* additions for new relocation code, must added to all boards */
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#define CFG_SYS_SDRAM_BASE 0xc0000000
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#include <asm/arch/hardware.h>
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#endif /* __CONFIG_H */
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