0613c36a7a
Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com>
44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013 Atmel Corporation.
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* Josh Wu <josh.wu@atmel.com>
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*
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* Configuation settings for the AT91SAM9N12-EK boards.
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*/
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#ifndef __AT91SAM9N12_CONFIG_H_
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#define __AT91SAM9N12_CONFIG_H_
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/* ARM asynchronous clock */
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#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CFG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
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/* Misc CPU related */
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#define CFG_SYS_SDRAM_BASE 0x20000000
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#define CFG_SYS_SDRAM_SIZE 0x08000000
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/* DataFlash */
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CFG_SYS_NAND_BASE 0x40000000
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#define CFG_SYS_NAND_MASK_ALE (1 << 21)
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#define CFG_SYS_NAND_MASK_CLE (1 << 22)
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#define CFG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
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#define CFG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
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#endif
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#define CFG_EXTRA_ENV_SETTINGS \
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"console=console=ttyS0,115200\0" \
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"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
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"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
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/* SPL */
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#define CFG_SYS_MASTER_CLOCK 132096000
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#define CFG_SYS_AT91_PLLA 0x20953f03
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#define CFG_SYS_MCKR 0x1301
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#define CFG_SYS_MCKR_CSS 0x1302
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#endif
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