9b0240f8c6
This converts the following to Kconfig: CONFIG_DM9000_BYTE_SWAPPED CONFIG_DM9000_NO_SROM CONFIG_DM9000_USE_16BIT CONFIG_DM9000_DEBUG CONFIG_MXC_GPT_HCLK CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC Signed-off-by: Tom Rini <trini@konsulko.com>
41 lines
1014 B
C
41 lines
1014 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9261EK board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
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#include <asm/hardware.h>
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/* SDRAM */
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#define CFG_SYS_SDRAM_BASE 0x20000000
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#define CFG_SYS_SDRAM_SIZE 0x04000000
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#define CFG_SYS_INIT_RAM_SIZE (16 * 1024)
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#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CFG_SYS_NAND_BASE 0x40000000
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/* our ALE is AD22 */
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#define CFG_SYS_NAND_MASK_ALE (1 << 22)
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/* our CLE is AD21 */
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#define CFG_SYS_NAND_MASK_CLE (1 << 21)
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#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC15
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#endif
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/* USB */
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#define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
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#endif
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