7c5c137c41
Perform a simple rename of CONFIG_PRAM to CFG_PRAM Signed-off-by: Tom Rini <trini@konsulko.com>
115 lines
3.1 KiB
C
115 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuation settings for the Freescale MCF5208EVBe.
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*
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* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#ifndef _M5208EVBE_H
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#define _M5208EVBE_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CFG_SYS_UART_PORT (0)
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/* I2C */
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#define CFG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"loadaddr=40010000\0" \
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"u-boot=u-boot.bin\0" \
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"load=tftp ${loadaddr) ${u-boot}\0" \
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"upd=run load; run prog\0" \
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"prog=prot off 0 3ffff;" \
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"era 0 3ffff;" \
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"cp.b ${loadaddr} 0 ${filesize};" \
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"save\0" \
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""
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#define CFG_PRAM 512 /* 512 KB */
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#define CFG_SYS_CLK 166666666 /* CPU Core Clock */
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#define CFG_SYS_PLL_ODR 0x36
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#define CFG_SYS_PLL_FDR 0x7D
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#define CFG_SYS_MBAR 0xFC000000
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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*/
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/* Definitions for initial stack pointer and data area (in DPRAM) */
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#define CFG_SYS_INIT_RAM_ADDR 0x80000000
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#define CFG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */
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#define CFG_SYS_INIT_RAM_CTRL 0x221
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/*
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SYS_SDRAM_BASE 0x40000000
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#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
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#define CFG_SYS_SDRAM_CFG1 0x43711630
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#define CFG_SYS_SDRAM_CFG2 0x56670000
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#define CFG_SYS_SDRAM_CTRL 0xE1002000
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#define CFG_SYS_SDRAM_EMOD 0x80010000
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#define CFG_SYS_SDRAM_MODE 0x00CD0000
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
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/* FLASH organization */
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#ifdef CONFIG_SYS_FLASH_CFI
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# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
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#endif
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#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE
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/*
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* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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*/
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#define LDS_BOARD_TEXT \
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. = DEFINED(env_offset) ? env_offset : .; \
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env/embedded.o(.text*);
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/* Cache Configuration */
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#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
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CFG_SYS_INIT_RAM_SIZE - 8)
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#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
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CFG_SYS_INIT_RAM_SIZE - 4)
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#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
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#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
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CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
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CF_ACR_EN | CF_ACR_SM_ALL)
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#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
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CF_CACR_DISD | CF_CACR_INVI | \
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CF_CACR_CEIB | CF_CACR_DCM | \
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CF_CACR_EUSP)
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/* Chipselect bank definitions */
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/*
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* CS0 - NOR Flash
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* CS1 - Available
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* CS2 - Available
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* CS3 - Available
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* CS4 - Available
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* CS5 - Available
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*/
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#define CFG_SYS_CS0_BASE 0
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#define CFG_SYS_CS0_MASK 0x007F0001
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#define CFG_SYS_CS0_CTRL 0x00001FA0
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#endif /* _M5208EVBE_H */
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