dbedf4a56b
Add support for setting nuvoton BMC NPCM845 voltage supply. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
133 lines
3.0 KiB
C
133 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2022 Nuvoton Technology Corp.
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <dm/device_compat.h>
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#include <power/regulator.h>
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#define REG_VSRCR 0xf08000e8 /* Voltage Supply Control Register */
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/* Supported voltage levels (uV) */
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static const u32 volts_type1[] = { 3300000, 1800000 };
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static const u32 volts_type2[] = { 1000000, 1800000 };
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#define VOLT_LEV0 0
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#define VOLT_LEV1 1
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struct volt_supply {
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char *name;
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const u32 *volts;
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u32 reg_shift; /* Register bit offset for setting voltage */
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};
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static const struct volt_supply npcm8xx_volt_supps[] = {
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{"v1", volts_type1, 0},
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{"v2", volts_type1, 1},
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{"v3", volts_type1, 2},
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{"v4", volts_type1, 3},
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{"v5", volts_type1, 4},
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{"v6", volts_type1, 5},
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{"v7", volts_type1, 6},
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{"v8", volts_type1, 7},
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{"v9", volts_type1, 8},
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{"v10", volts_type1, 9},
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{"v11", volts_type2, 10},
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{"v12", volts_type1, 11},
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{"v13", volts_type1, 12},
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{"v14", volts_type2, 13},
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{"vsif", volts_type1, 14},
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{"vr2", volts_type1, 30},
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};
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static const struct volt_supply *npcm8xx_volt_supply_get(const char *name)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(npcm8xx_volt_supps); i++) {
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if (!strcmp(npcm8xx_volt_supps[i].name, name))
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return &npcm8xx_volt_supps[i];
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}
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return NULL;
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}
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static int npcm8xx_regulator_set_value(struct udevice *dev, int uV)
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{
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struct dm_regulator_uclass_plat *uc_pdata;
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const struct volt_supply *supp;
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u32 val, level;
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uc_pdata = dev_get_uclass_plat(dev);
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if (!uc_pdata)
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return -ENXIO;
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dev_dbg(dev, "%s set_value: %d\n", uc_pdata->name, uV);
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supp = npcm8xx_volt_supply_get(uc_pdata->name);
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if (!supp)
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return -ENOENT;
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if (uV == supp->volts[VOLT_LEV0])
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level = VOLT_LEV0;
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else if (uV == supp->volts[VOLT_LEV1])
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level = VOLT_LEV1;
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else
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return -EINVAL;
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/* Set voltage level */
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val = readl(REG_VSRCR);
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val &= ~BIT(supp->reg_shift);
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val |= level << supp->reg_shift;
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writel(val, REG_VSRCR);
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return 0;
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}
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static int npcm8xx_regulator_get_value(struct udevice *dev)
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{
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struct dm_regulator_uclass_plat *uc_pdata;
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const struct volt_supply *supp;
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u32 val;
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uc_pdata = dev_get_uclass_plat(dev);
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if (!uc_pdata)
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return -ENXIO;
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supp = npcm8xx_volt_supply_get(uc_pdata->name);
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if (!supp)
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return -ENOENT;
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val = readl(REG_VSRCR) & BIT(supp->reg_shift);
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dev_dbg(dev, "%s get_value: %d\n", uc_pdata->name,
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val ? supp->volts[VOLT_LEV1] : supp->volts[VOLT_LEV0]);
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return val ? supp->volts[VOLT_LEV1] : supp->volts[VOLT_LEV0];
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}
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static int npcm8xx_regulator_set_enable(struct udevice *dev, bool enable)
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{
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/* Always on */
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return 0;
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}
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static const struct dm_regulator_ops npcm8xx_regulator_ops = {
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.set_value = npcm8xx_regulator_set_value,
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.get_value = npcm8xx_regulator_get_value,
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.set_enable = npcm8xx_regulator_set_enable,
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};
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static const struct udevice_id npcm8xx_regulator_ids[] = {
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{ .compatible = "regulator-npcm845" },
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{ },
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};
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U_BOOT_DRIVER(regulator_npcm8xx) = {
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.name = "regulator_npcm845",
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.id = UCLASS_REGULATOR,
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.ops = &npcm8xx_regulator_ops,
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.of_match = npcm8xx_regulator_ids,
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};
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