Commit Graph

5 Commits

Author SHA1 Message Date
Andreas Bießmann
09c2b8f3e3 Change my mailaddress
I'll switch my mails to my own server, so drop all gmail references.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-05-02 18:37:09 -04:00
Andreas Bießmann
5c390a5b26 arm:at91: enable ROM loadable atmel image
For sama5d3xek we need to modify the SPL image for correct detection by ROM
code.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
2014-05-27 00:10:49 +02:00
Wolfgang Denk
d4c8aa9cb4 Coding Style cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-14 16:06:54 -04:00
Wu, Josh
b2d96dc28f ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size
Define the galois index table offset in chip head file. So user do not need
to set by himself. Driver will set it correctly according to sector_size.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
[rebased on master]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:50:16 +02:00
Wu, Josh
bdfd59aa0f at91: atmel_nand: Update driver to support Programmable Multibit ECC controller
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.

This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00