Commit Graph

7689 Commits

Author SHA1 Message Date
Tom Rini
f76750d111 Convert CONFIG_CONS_INDEX et al to Kconfig
This converts the following to Kconfig:
   CONFIG_CONS_INDEX
   CONFIG_DEBUG_UART_CLOCK
   CONFIG_FSL_TZPC_BP147
   CONFIG_GENERIC_ATMEL_MCI
   CONFIG_IDENT_STRING
   CONFIG_LIBATA
   CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE
   CONFIG_LPC32XX_GPIO
   CONFIG_MP
   CONFIG_MPC8XXX_GPIO
   CONFIG_MTD_PARTITIONS
   CONFIG_MVGBE
   CONFIG_MXC_GPIO
   CONFIG_NR_DRAM_BANKS
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_PREBOOT
   CONFIG_ROCKCHIP_SERIAL
   CONFIG_RTC_ENABLE_32KHZ_OUTPUT
   CONFIG_RTC_MV
   CONFIG_SCSI_AHCI
   CONFIG_SF_DEFAULT_BUS
   CONFIG_SF_DEFAULT_CS
   CONFIG_SF_DEFAULT_SPEED
   CONFIG_SOFT_SPI
   CONFIG_SPI_FLASH_EON
   CONFIG_SPI_FLASH_MACRONIX
   CONFIG_SPI_FLASH_MTD
   CONFIG_SPI_FLASH_SPANSION
   CONFIG_SPI_FLASH_SST
   CONFIG_SPI_FLASH_STMICRO
   CONFIG_SUPPORT_RAW_INITRD
   CONFIG_SYS_ARCH_TIMER
   CONFIG_SYS_BOARD
   CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
   CONFIG_SYS_DCACHE_OFF
   CONFIG_SYS_FDT_SAVE_ADDRESS
   CONFIG_SYS_FLASH_CFI
   CONFIG_SYS_FSL_ERRATUM_ESDHC135
   CONFIG_SYS_HAS_SERDES
   CONFIG_SYS_L2CACHE_OFF
   CONFIG_SYS_LITTLE_ENDIAN
   CONFIG_SYS_LOAD_ADDR
   CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
   CONFIG_SYS_NS16550
   CONFIG_SYS_PLLFIN
   CONFIG_SYS_SPI_U_BOOT_OFFS
   CONFIG_TIMER_SYS_TICK_CH
   CONFIG_USB_EHCI_FSL
   CONFIG_U_QE
   CONFIG_VERSION_VARIABLE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
66e0e2b1cd Convert CONFIG_SD_BOOT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SD_BOOT
   CONFIG_SD_BOOT_QSPI

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
7e6a6fd821 Convert CONFIG_ENV_SPI_BUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_SPI_BUS
   CONFIG_ENV_SPI_CS
   CONFIG_ENV_SPI_MAX_HZ
   CONFIG_ENV_SPI_MODE

As part of this, we use Kconfig to provide the defaults now that were
done in include/spi_flash.h.  We also in some cases change from using
CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in
use anyhow as ENV was not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
5fd4a7ed0c Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in Kconfig
This is a "hex" prompt but the default value was given as an int.
Switch the default to hex (0x0) and remove the defconfigs that were
using the default, but as hex before.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Simon Glass
239d22c795 fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARD
Use this new Kconfig instead of OF_BOARD, so we know for sure which boards
obtain their devicetree from a prior stage. Leave sandbox alone since it
does not. Also don't touch xilinx_versal_virt since it does not have a
specific TARGET Kconfig.

This option implies OF_BOARD for now, but with future work standard
passage may be used instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add rpi_4_32b and rpi_arm64 to the list of boards converted]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-23 11:19:17 -05:00
Simon Glass
836eac7c6f fdt: Make OF_BOARD a bool option
This should not be a separate option from OF_SEPARATE. It is a run-time
option to override the devicetree, even if present.

Move the option out of the choice.

Disable BINMAN_FDT for a few boards which don't actually use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
975e0e04bb arm: highbank: Add devicetree files
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
c4607665da arm: qemu-ppce500: Add a devicetree file
This uses QEMU virt which creates its own devicetree.

Add an empty version of this file, so that we can at least build this
board when devicetrees are required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
142918807d arm: bcm7xxx: Add a devicetree file
Add an empty devicetree file for these boards. It seems to be possible to
obtain a real one from another bootloader called 'bolt' but I will leave
this to the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
50d857ebc4 arm: xilinx_versal_virt: Add a devicetree file
Add an empty file to prevent build errors when building with
CONFIG_OF_SEPARATE enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
56a47ba21b arm: octeontx: Add an empty devicetree file
Add an empty file to prevent build errors when building with
CONFIG_OF_SEPARATE enabled.

Unfortunately there are no build instructions in the U-Boot tree to enable
a real file to be created.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
e5e6cc7cfa arm: xenguest_arm64: Add a empty devicetree file
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.

The real devicetree is created by the Xen project on-the-fly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
aa26948b58 arm: vexpress: Add a devicetree files for juno
Sync these file, obtained from Linux v5.15.

Add a note for the maintainer, and SPDX lines where they are missing.
The added lines are:

   SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause

Note, this matches the text in those files, but is not the same as the
GPL-2.0 of some files.

[1] https://releases.linaro.org/android/reference-lcr/juno/7.1-17.05/

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-23 10:24:39 -05:00
Simon Glass
9ae600e9e2 arm: rpi: Sync rpi dts files from Linux
Sync these files, obtained from Linux v5.15.

This adds a devicetree file for rpi_4 which was not there before.

Testing shows no change so far as I can see:
- boots to U-Boot prompt on rpi0, rpi2
- boots to distro on rpi3
- boots to distro on rpi4

I am assuming that syncing with Linux is safe, but the maintainer should
know for sure.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
4027792090 riscv: qemu: Split devicetree files for qemu_riscv32/64
This uses QEMU virt which creates its own devicetree.

Copy the existing empty version of this file, so splitting the existing
qemu-virt into two, since anyone actually trying to use this will need a
different devicetree for 32- and 64-bit machines.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
9f4f5f1f4a arm: qemu: Add a devicetree file for qemu_arm64 virt
This uses QEMU virt which creates its own devicetree.

Add an empty version of this file, so that we can at least build this
board when devicetrees are required.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Simon Glass
4dc1d8318b arm: qemu: Add a devicetree file for qemu_arm
This uses QEMU virt which creates its own devicetree.

Add an empty version of this file, so that we can at least build this
board when devicetrees are required.

Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-23 10:24:39 -05:00
Tom Rini
4afab30cae Prepare v2022.01-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmHArDwACgkQFHw5/5Y0
 tyzxyAv/SjZjoEwG8nu7ptVZqTsZfm+tVwwWmQEBAA40MXy/KSccDtbUwB5GCO6f
 Uvk+qFFDbCkbGZh5VKbQusMmUoB02Xu9zUoSxKxcXL4WfC6Bg5GV/UWN9s8G3Tm6
 4wcP0l8WFcQjjr89UfXugiZH58psvFu6PBbWVY4rMH9gZ5ds0AkNOF0L+HbdVmMR
 a5HBfrcySRY2kiTQuKF+RVlMW6BtaOqJp/XIyy8w6bH09ykMomj/u7z3JP3y9ZzL
 w3FXqCLlIEnvdDcqfWvfjoJ/gm0WcLulgSVpTFGS0jgJpnbeAURtZcuVgj6aPRUW
 FRon+u0tj3wpFjibs2cpyXWd+gw/bLLFpDXx78AUAPjxG31tEKbnR1j8R8wBZJ0B
 TqWZ3pCne/LPOT90y2KW2z6ty2n/yEn6qEFFT9MN9R4L0N+U0er//sYJC/nn/e6u
 fjvQ9OPLbnAfHVrad3ZeIkePrLOIF6XYwNQpsjt9aE2kU9IvV5sTa8TxZuQgasBU
 A46FgXtC
 =MEG2
 -----END PGP SIGNATURE-----

Merge tag 'v2022.01-rc4' into next

Prepare v2022.01-rc4
2021-12-20 17:12:04 -05:00
Stefan Roese
9f704def5e arm: mvebu: maxbcm_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-12-19 09:50:47 +01:00
Stefan Roese
f9776e52c3 arm: mvebu: ds414_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
2021-12-19 09:50:47 +01:00
Stefan Roese
fdc44284eb arm: mvebu: db-mv784mp-gp_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-12-19 09:50:47 +01:00
Stefan Roese
bf664d8e54 arm: mvebu: theadorable_debug_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-12-19 09:50:47 +01:00
Tom Rini
b9c9ce8a40 First set of u-boot-at91 features for the 2022.04 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmG8PNIcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyN4NCACbdi5EFjoNkGhCWLIX
 SobXNcBGaL9Zpr5qZq77uFqFeFPeiAClk9X+TcSHhBTSWPugzNCdXEdENEGdiiOR
 Yxe/QvBL7ZsKkhGBw5W8sb81NBPlpnVY7DWufjYvWq7S3C3bIDahQpCeWHKXDO0H
 ZzIX1413kfHRKsAIT+IbufmC1dcWY8SWQEArSkL2KhTQyHnLVGAaholgEGXoKMoC
 0ACXO+uhqaAY0/1eWvvYjcfotlz881ROajSRITh+Gu0UuHyRr2Fvj7jZvF5E4Q4f
 Cu8iciDsimYSDGLZsOJjPIDTfsx9jbA8IcYIAMxOLW8OYbIL6QAUKsJ2LLKao1q5
 SYXP
 =YXsB
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-2022.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2022.04 cycle:

This feature set includes : support for the new QSPI hardware on
sama7g5, small fixes on sam9x60 and sama7g5, some additions of commands
and PIO controller on sam9x60/sam9x60ek.
2021-12-17 07:25:34 -05:00
Tom Rini
cfbd2bc695 - enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
   - increase USB power-good delay
   - add update_sf script to install U-Boot into SF
   - increase PHY auto-negotiation timeout to 20 seconds
   - fix SoM and board coding strap GPIO handling
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmG3TqYcHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/puhJEACl9lNg7+0GDd6eoi73
 NR4+r1JYPDkYKbbBWjHVueIwKYbpk1uSzYLB70lchUVbdvu3fczJc7uOXTDRnrCN
 13BuMa45HAWxvb/9UuHz3AnrLEsSvEgGCRCXK0FrE0mu1yBZK+6iO1ysuQEJA78j
 7tyBs6i+IzuAusejx8NiqjYughIFZKBzfztLe3OSxDhEam+vCCEAIUoTx7FSq1jp
 TumZULkfx0SCSL86vPnzczjtucrtKiaWhjNLDbg0Ilf28qYYTCdlDcpi7ySpr43u
 VJTAKAXYVQq4Ye3qsth6GSsTZ1pONBoSaaOo2z/hoQu+/Y4+yUrzkLB+0dSrqgsW
 FPosN9/OPSRcBIfhFEV9RojhHK9OxYXr0WjBctb6fZKzHK52neVv819Ixy5WBJvq
 gXo6jK78ILxzOUx1PzRj2safKhArAuPrxD2Lv0wNKqNCWJJZbT037L6p5CFG30UI
 7yltaYm1ukAT6q6MeergHAAcdgYV+nyFOUs7udQY5HltzLpBJkdIGHKJpioAhvYJ
 KNHMwANd499/edL/FdXXN7X8sfb7ylaUaqDfkHPJgfDDFmF4lQ591k+jWeD8H1lo
 LYUhd4/7EvNAS02fvwmrdTWYCCFyxL1HFxwOlFqrkthFJnJj70shBJsB786pvihq
 wd9npDIUFJGSTCTA4uXCu3YHlA==
 =Qgdj
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm

- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling

# gpg verification failed.
2021-12-13 10:20:25 -05:00
Marek Vasut
5c592b636a ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:22 +01:00
Adam Ford
dcbf1145e2 ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Simon Glass
36cc7bfd54 sandbox: Drop CONFIG_SYS_TIMER_RATE
This is not used by sandbox since it uses driver model for the timer.

Drop it.

Also update the tools_only build to avoid build errors, since it does
actually build U-Boot too. Enable DM so we can use CONFIG_TIMER,
disable EFI_LOADER to avoid an error about board_quiesce_devices() and
disable NET to avoid having to define CONFIG_AVB_BUF_ADDR

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:26:26 -07:00
Simon Glass
93e1edffb0 Convert CONFIG_KEYBOARD to Kconfig
This converts the following to Kconfig:
   CONFIG_KEYBOARD

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-05 09:26:26 -07:00
Thomas Skibo
6a863894ad riscv: Support booting SiFive Unmatched from SPI.
Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
Padmarao Begari
5c007d24b9 riscv: Update Microchip MPFS Icicle Kit support
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addresses and default build for SBI_V02.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:52 +08:00
Tom Rini
c7fad78ec0 Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BR0_PRELIM
   CONFIG_SYS_OR1_PRELIM
   CONFIG_SYS_BR1_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR2_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR3_PRELIM
   CONFIG_SYS_OR3_PRELIM
   CONFIG_SYS_BR4_PRELIM
   CONFIG_SYS_OR4_PRELIM
   CONFIG_SYS_BR5_PRELIM
   CONFIG_SYS_OR5_PRELIM
   CONFIG_SYS_BR6_PRELIM
   CONFIG_SYS_OR6_PRELIM
   CONFIG_SYS_BR7_PRELIM
   CONFIG_SYS_OR7_PRELIM

This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms
that can set these values do so.  Add the relevant SYS_BRx_PRELIM_BOOL
to platforms that had not been previously migrated.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:10 -05:00
Tom Rini
970bf8603b Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USE_BOOTCOMMAND
   CONFIG_BOOTCOMMAND
   CONFIG_RAMBOOTCOMMAND
   CONFIG_NFSBOOTCOMMAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-01 10:58:10 -05:00
Patrick Delaunay
e84ee40b0b configs: stm32mp15: deactivate the CONFIG_STM32_IPCC
The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.

So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
8ad37e6f16 board: stm32mp1: enable simple framebuffer node for splashscreen
Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.

These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-30 16:43:28 +01:00
Patrick Delaunay
d71587c2ab Convert CONFIG_LCD_DT_SIMPLEFB to Kconfig
This converts the following to Kconfig:
   CONFIG_LCD_DT_SIMPLEFB

This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in
common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:43:28 +01:00
Marek Vasut
7d35a499bd ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-30 16:43:28 +01:00
Heinrich Schuchardt
617270b97b configs: enable CMD_TPM on QEMU ARM
With TPM emulation enabled in u-boot-test-hooks we should also provide the
tpm2 command used for the test/py/tests/test_tpm2.py test.

One of the Python TPMv2 tests expects sandbox specific values. So disable
it on other platforms.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-30 09:23:37 +01:00
Tom Rini
2402c93130 Prepare v2022.01-rc3
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmGk/4sACgkQFHw5/5Y0
 tyyjtgwAo0jCRa1Vyc5z2RrINGdARoPhNcCnBNMYEVTjH9uP0/Mzlpo4i1IWX5qP
 nEuVmP01KjtWDRNy7Cpr45/j2PkTZ0THqXGZKpTG/yALdUKZw0wbzeh/CMllWh0A
 9yJfMbv2/IV79rbb6osxItjusSr5PnrU5fHsR+zUfC8NRZpzWGfpH8a6NpfGvGYo
 3OUKNJrGv930C3MqVnUEHPIuz+vL9fWLSs/rK/JHVZt+ALU45uYtz4cKycMoElVd
 IUJe3mhKhw0k8dO8R+p3UAEFrP+LZdcBLgCt8wRQK6Yl4lcxYOtZgYuJuM9Kp20s
 abqIuky3TWwFjpNM60Gmo63Yf967jOeI/lfITq2juZ5TBlNKOO6Z/NRVUsHkNKFG
 7qJC14/NxuSdN4u9s2h+rJBBGYc+BzWVO/ikigHnsCeFQYfafJpGTnPSJr55OU5X
 eeB6l3blx6jwxOPAz0JhLecZb4e027R+eKionirMEnVPENtnJjF1d+CulkekahUO
 LvdqKaBE
 =h4j5
 -----END PGP SIGNATURE-----

Merge tag 'v2022.01-rc3' into next

Prepare v2022.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-29 12:00:57 -05:00
Simon Glass
0a92deec49 sandbox: Enable HEXDUMP for sandbox_flattree
At present the hexdump tests are disabled in sandbox_flattree. This is
good, because they do not pass. Enable the required Kconfig so that they
will, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-28 16:51:51 -07:00
Patrick Delaunay
7f6743d4f8 stm32mp15: deactivate CONFIG_SCMI_AGENT_MAILBOX
Deactivate the SCMI agent mailbox which is not used on STM32MP15
platforms.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23 13:53:03 -05:00
Samuel Holland
f11513d997 net: phy: realtek: Add tx/rx delay config for 8211e
Some boards need to change the tx/rx delay config in order for
gigabit Ethernet to work.

In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), Realtek documented the bits for overriding the delays
from the hardware straps.

Copy the logic from linux, so the delay config is set from the PHY's
interface type (the phy-mode property in the device tree).

This removes the need for a one-off workaround for the Pine A64+ board.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23 09:57:56 +02:00
Vladimir Oltean
0997bb46aa configs: ls1021a-tsn: enable the generation of random Ethernet MAC addresses
Don't fail when booting a board with an empty EEPROM for MAC addresses.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-23 09:57:56 +02:00
Vladimir Oltean
0545e7f4ee configs: ls1021a-tsn: enable sja1105 switch driver
The sja1105 is a 5-port switch that uses a DM_DSA driver. Its 5th (CPU)
port is connected internally to the eth2 port of the LS1021A SoC.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-23 09:57:56 +02:00
Mihai Sain
396a8c5398 configs: at91: sam9x60ek: add CLK and GPIO commands
Add clock command for CLK sub-system and gpio command for query and control gpio
pins.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2021-11-22 12:39:55 +02:00
Mihai Sain
76c8e9ce2c configs: sama5d2 boards: add DM and GPIO commands
Add dm command for driver model low level access and
gpio command for query and control gpio pins.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2021-11-22 12:39:55 +02:00
Aswath Govindraju
b5b97ae073 configs: am64x_evm_*_defconfig: Add configs to enable serdes for USB 3.0 support
Add configs to enable serdes for USB 3.0 support.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-11-17 17:10:16 -05:00
Chia-Wei Wang
e3cdc2cbb1 configs: ast2600: Boot kernel FIT in DRAM
AST2600 leverages the FIT hash/signature verification to fulfill
secure boot trust chain. To improve the performance and save SW
code size for those crypto operations, the two HW crypto engine,
HACE and ACRY, are enabled.

However, both of the engines can only access to data stored in
DRAM space. Therefore, we need to move the FIT image into DRAM
before the booting.

This patch update the CONFIG_BOOTCOMMAND to execute the pre-defined
ENV variable which consists of FIT image copy to memory and booting.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17 17:05:57 -05:00
Chia-Wei Wang
ddd778aebe configs: ast2600-evb: Enable SPL FIT support
Enable SPL FIT image load and verification support.
The HW accelerated SHA is also available with the
newly added support of the HACE HW hash engine.

The SPL thumb build is also enabled to keep the binary
less than 64KB to fit into the Aspeed secure boot design.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
2021-11-17 17:05:57 -05:00
Simon Glass
370cc945df arm: qemu: Enable the debug UART
Enable this to permit early debugging. Due to the way qmeu works, the
input clock can be zero and things still work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-17 17:04:59 -05:00
Simon Glass
31ec464d65 arm: Fix some inconsistent debug-UART CONFIG options
A few boards enable CONFIG_DEBUG_UART_BOARD_INIT but do not define the
required init function. Fix this by disabling the debug UART.

With snow the debug UART is enabled but the driver CONFIG is not. Fix this
too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-17 17:04:58 -05:00