2 Commits

Author	SHA1	Message	Date
Chin Liang See	6f94fa21cc	arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1 ... Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>	2016-10-27 08:03:10 +02:00
Pavel Machek	35546f6f20	ARM: socfpga: add support for IS1 board ... This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>	2016-06-08 02:56:30 +02:00