There may be multiple PCIe controllers in a SoC.
It is not correct that always calling pci_bus_to_hose(0) to get
the first PCIe controller for the PCIe device connected other
controllers. We just remove this calling because hose always point
the correct PCIe controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
for the legacy PCI driver, the function pci_bus_to_hose() returns
the real PCIe controller. To keep consistency, this function is
changed to return the PCIe controller pointer of the root bus
instead of the current PCIe bus.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable DT to support Driver Model.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
For the function alloc_stream_ids() append_mmu_masters() and
fdt_fixup_smmu_pcie() there are no related definitions and they
are never called. So the patch removes the unnecessary declares.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
It is recommended to set forced-order mode in RNI-6,
RNI-20 for performance optimization in LS2088A.
Both LS2080A, LS2088A families has CONFIG_LS2080A define.
As above update is required only for LS2088A, skip this
for LS2080A SoC family.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The generic probe code in dm works, so get rid of the leftover cruft.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Revision 1.0 of this IP has a quirk where if during a long read transfer
the transfer_size register will go to 0, the master will send a NACK to
the slave prematurely.
The way to work around this is to reprogram the transfer_size register
mid-transfer when the only the receive fifo is known full, i.e. the I2C
bus is known non-active.
The workaround is based on the implementation in the linux-kernel.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Reorder the timeout loop such that we first check if the
condition is already true, and then call udelay() so if
the condition is already true, break early.
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Revision 1.0 of this IP has a couple of issues, such as not supporting
repeated start conditions for read transfers.
So scan through the list of i2c messages for these conditions
and report an error if they are attempted.
This has been fixed for revision 1.4 of the IP, so only report the error
when the IP can really not do it.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
For mux check if the parent is already a device of UCLASS_I2C and if yes
just use that. Otherwise see if someone specified an i2c-parent phandle.
This mimics the behavior found in the Kernel, as it removes the
requirement to explicitly specify a i2c-parent phandle.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Commit bb5930d5c9 ("exynos: video: Convert several boards to driver
model for video") converted the Exynos Chromebooks machines to use DM
for video, but this breaks backward compatibility with the stdout env
var since now stdout is expected to be "vidconsole" instead of "lcd".
This causes display to not work when updating u-boot on these boards
if the old stdout env var is used. Since these are consumer devices,
there's no easy way to have a serial console so users may be confused
thinking that u-boot failed to boot, or in the best case will need to
update the stdout env var blindly to make the display to work again.
There's a CONFIG_VIDCONSOLE_AS_LCD config option to workaround this,
so enable it in the Chromebooks' default configuration files to allow
users to change their stdout env var before the workaround is removed.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Once upon a time u-boot didn't support building with two usb host
controller types, these days it does. Enable XHCI in addition to the
existing EHCI support so user can plug usb devices in all available
ports regardless of the controller type.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
For snow when chainloading u-boot the CPU seems to be running at full
speed. The lower CPU voltage seems to be ok for u-boot, but when booting
linux (bringing up all cores) I'm seeing random crashes.
Bump the voltage up to a level that's safe for all cpu frequencies.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Removes the codes of soft_i2c.
There is no usasge for universal_c210, also didn't define
CONFIG_SOFT_I2C_GPIO_SCL.
This code seems a dead code.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
If CONFIG_SYS_I2C_S3C24X0_SLAVE isn't defined, then complie error should
be occurred.
This patch is for preventing it.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Revmoe the "ifndef CONFIG_DM_I2C".
Intead, use the driver model for max8998.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Enable the CONFIG_DM_PMIC and CONFIG_DM_PMIC_MAX8998.
s5pc210_universal board is using max8998 pmic.
To use the i2c/pmic driver model, enable these configurations.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add the i2c_5 node and pmic as its child node.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
For Getting from uclass, use the "max8998-pmic" as name.
It also needs to change the dt-node's name as "max8998-pmic".
Otherwise, it doesn't find the pmic device.
Because it's only searching for 'max8998_pmic'.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Initialize SBC and Support Card in U-Boot proper instead of SPL.
We may run different firmware (ex. ARM Trusted Firmware) before
U-Boot, and basic SoC initialization may be done there. In that
case, SPL may not be used.
The motivation for preparing SBC and Support Card in SPL was to use
LED for early debugging, but this is not mandatory to boot SoCs.
With this commit, LED will be unavailable in SPL, but we can use a
debug serial instead. So, this change will not be a big deal.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Merge init-*.c into a single file using a table of callbacks because
the initialization flow is almost common among SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The code here is cluttered due to the switch statement. Introduce a
table of callbacks to clean up the initialization code across SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Latest gcc 6.2 compiler is throwing the below warning for am335x_baltos_defconfig
drivers/usb/gadget/ether.c:501:17: warning: 'mdlm_detail_desc' defined but not used [-Wunused-const-variable=]
static const u8 mdlm_detail_desc[] = {
Guard mdlm_detail_desc with CONFIG_USB_ETH_SUBSET to avoid the warning
Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Drop board_ehci_power when dm usb used and switch to use
regulator api to handle vbus.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Implement ofdata_to_platdata to set the type to host or device.
- Check "dr-mode" property.
- If there is no "dr-mode", check phy_ctrl for i.MX6
and phy_status for i.MX7
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
By enabling DM_USB information about number of storage devices
was lost.
Get this information back simply by printing number of devices detected
via BLK uclass.
For example:
scanning bus 0 for devices... 7 USB Device(s) found
scanning usb for storage devices... 3 Storage Device(s) found
scanning usb for ethernet devices... 0 Ethernet Device(s) found
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
GCC 6.1 complains about this.
drivers/usb/gadget/dwc2_udc_otg.c:72:19: warning: 'driver_desc'
defined but not used [-Wunused-const-variable=]
static const char driver_desc[] = DRIVER_DESC;
^~~~~~~~~~~
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Splitting reset assertion (support_card_reset) and deassertion
(support_card_init) is not adding much value any more. Handle
all the initialization of Support Card in support_card_init(),
then remove support_card_reset().
Also, detect_num_flash_banks() can have a static qualifier.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.
There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
- DRAM 3 channels: sLD3
- DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20
All of them can be moved into a single file by a little more
refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks. Separate the UMC clocks and the other
clocks for better code reuse across SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
At first, we thought the LD20 PLL setting would be board dependent,
but this argument turned out unneeded after all.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable SDMA (Single Operation DMA) for LD11, but not for LD20.
The SDMA does not work for LD20 boards because they are generally
equipped with more memory than fits in the 32 bit physical address
space supported by the SDMA.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
