Commit Graph

25 Commits

Author SHA1 Message Date
Mark Kettenis
045474be5e nvme: Split out PCI support
Apple SoCs have an integrated NVMe controller that isn't connected
over a PCIe bus. In preparation for adding support for this NVMe
controller, split out the PCI support into its own file. This file
is selected through a new CONFIG_NVME_PCI Kconfig option, so do
a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-10 16:44:23 -05:00
Tom Rini
5e2fd60b97 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:19 -05:00
Tom Rini
7856cd5a6d Convert CONFIG_SYS_PCI_64BIT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_PCI_64BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:17 -05:00
Tom Rini
f76750d111 Convert CONFIG_CONS_INDEX et al to Kconfig
This converts the following to Kconfig:
   CONFIG_CONS_INDEX
   CONFIG_DEBUG_UART_CLOCK
   CONFIG_FSL_TZPC_BP147
   CONFIG_GENERIC_ATMEL_MCI
   CONFIG_IDENT_STRING
   CONFIG_LIBATA
   CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE
   CONFIG_LPC32XX_GPIO
   CONFIG_MP
   CONFIG_MPC8XXX_GPIO
   CONFIG_MTD_PARTITIONS
   CONFIG_MVGBE
   CONFIG_MXC_GPIO
   CONFIG_NR_DRAM_BANKS
   CONFIG_OF_BOARD_SETUP
   CONFIG_OF_STDOUT_VIA_ALIAS
   CONFIG_OF_SYSTEM_SETUP
   CONFIG_PREBOOT
   CONFIG_ROCKCHIP_SERIAL
   CONFIG_RTC_ENABLE_32KHZ_OUTPUT
   CONFIG_RTC_MV
   CONFIG_SCSI_AHCI
   CONFIG_SF_DEFAULT_BUS
   CONFIG_SF_DEFAULT_CS
   CONFIG_SF_DEFAULT_SPEED
   CONFIG_SOFT_SPI
   CONFIG_SPI_FLASH_EON
   CONFIG_SPI_FLASH_MACRONIX
   CONFIG_SPI_FLASH_MTD
   CONFIG_SPI_FLASH_SPANSION
   CONFIG_SPI_FLASH_SST
   CONFIG_SPI_FLASH_STMICRO
   CONFIG_SUPPORT_RAW_INITRD
   CONFIG_SYS_ARCH_TIMER
   CONFIG_SYS_BOARD
   CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
   CONFIG_SYS_DCACHE_OFF
   CONFIG_SYS_FDT_SAVE_ADDRESS
   CONFIG_SYS_FLASH_CFI
   CONFIG_SYS_FSL_ERRATUM_ESDHC135
   CONFIG_SYS_HAS_SERDES
   CONFIG_SYS_L2CACHE_OFF
   CONFIG_SYS_LITTLE_ENDIAN
   CONFIG_SYS_LOAD_ADDR
   CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
   CONFIG_SYS_NS16550
   CONFIG_SYS_PLLFIN
   CONFIG_SYS_SPI_U_BOOT_OFFS
   CONFIG_TIMER_SYS_TICK_CH
   CONFIG_USB_EHCI_FSL
   CONFIG_U_QE
   CONFIG_VERSION_VARIABLE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Thomas Skibo
6a863894ad riscv: Support booting SiFive Unmatched from SPI.
Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
Tom Rini
9802154a94 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 12:19:22 +00:00
Tom Rini
cdcbd593ad configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 09:42:22 -04:00
Tom Rini
6674edaabf Prepare v2021.10-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmFBKRgACgkQFHw5/5Y0
 tyw/PwwAtGB3rBeYW4rjWuMC5WP1UDTnvZIAok5ImWumWDahjDm8Yq2VCzAe9adw
 EYBjuNmaNl9aQvGVqlVJeIcLku5MLuLQu2za8vhc1R8X9VTPPY+LLTcdOokOmB8y
 8JiaE7fJsb1bZeV+diF9tss3B0IkUrwSJtW1d+qfdz/4UiRvwK5BhnZgzIobDldO
 g1Ldz/xiR2GOAXlUMwDrNAi6qNvmeAqRsQxySVrjltAV2ST7LJnOiHuWvJX6g6VS
 l796Hleh/kULfEW6n+1ZaTNqvVRcJ8xYSOG8w8y9u6HuPBA3JrYH1p1Eo5n7PPDv
 US71Iy/ncweTyfTMEBThWLqjHOQ05sVkWX/r4fj2iJRli+Og53lE1fVJ4ajIx7vz
 Tc76wI43i0I5lr2yTErjUG6EzDDoueqd+c8BwxihNLUK/+QG31xoCEMfC80C25ro
 QhYVFgiPWN0ySUD5M5tbGXODvfNNIDKXpY5oSOTVtemZtDEMpO2zBM1s/K3RV7Ud
 Je9Pj0Cu
 =Me42
 -----END PGP SIGNATURE-----

Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt
2021-09-16 10:29:40 -04:00
Heinrich Schuchardt
7383432fa1 riscv: enable booting HiFive Unmatched from SATA
On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA
drive. Enable booting from it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-07 10:34:28 +08:00
Simon Glass
ea2ca7e17e spi: Rename SPI_SUPPORT to SPI
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
Simon Glass
103c5f1806 mmc: Rename MMC_SUPPORT to MMC
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup some incorrect renames]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 11:42:41 -04:00
Andreas Schwab
c8291f53b0 lib: add crc16.o if CONFIG_MMC_SPI_CRC_ON for SPL build
CONFIG_MMC_SPI_CRC_ON needs the crc16 functions, but it was not included
in an SPL build.  For non-SPL builds, crc16.o is already added
unconditionally.  This also removes CONFIG_SPL_YMODEM_SUPPORT from the
sifive board configs, which is only relevant for some ARM boards and was
only set for its side effect of adding crc16.o.
2021-09-02 10:17:45 -04:00
Tom Rini
7cfbba36e9 Convert CONFIG_SYS_MALLOC_LEN to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MALLOC_LEN

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:47:49 -04:00
Tom Rini
49c8ef0e45 Convert CONFIG_SYS_LOAD_ADDR to Kconfig
Now that we have consistent usage, migrate this symbol to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:46:37 -04:00
Tom Rini
88cd7d0ea9 Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to Kconfig
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR
  based on current usage.
- Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
  CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE
  CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
  to Kconfig.  We move these symbols around a bit and add appropriate
  dependencies to them.  In some cases, we now add a correct default value
  as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
Tom Rini
d7d40f614d Convert CONFIG_ID_EEPROM to Kconfig
This converts the following to Kconfig:
   CONFIG_ID_EEPROM

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
Simon Glass
83061dbd1c Rename GPIO_SUPPORT to GPIO
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:29:36 -04:00
Tom Rini
df59b7d23b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-26 21:10:37 -04:00
Zong Li
e52b83ab13 board: sifive: drop stuff related to unmatched revision 1
This patch reverts the following commits:
 - 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1")
 - ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board")

We won't plan to support unmatched that the revision below 3 in u-boot,
so they can be dropped because they might be useless.

Changed in v2:
 - rebase codebase to the latest master branch

Signed-off-by: Zong Li <zong.li@sifive.com>
Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-21 16:39:57 +08:00
Tom Rini
fd075f77ca configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-08 09:33:10 -04:00
Zong Li
4b4159d0f3 board: sifive: support spl multi-dtb on unmatched board
There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-07-06 20:24:26 +08:00
Dimitri John Ledkov
fe01f41d57 riscv: sifive: Set default fdtfile names
Set default fdtfile names for unleashed and unmatched boards, as used
in the upstream Linux kernel. This allows sysboot command to find and
load appropriate dtb for the matching kernel from universal stock
Ubuntu RISC-V rootfs images based on fdtdir setting in extlinux.conf.

Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
cc: Paul Walmsley <paul.walmsley@sifive.com>
cc: Palmer Dabbelt <palmer@dabbelt.com>
cc: Anup Patel <anup.patel@wdc.com>
cc: Atish Patra <atish.patra@wdc.com>
cc: Pragnesh Patel <pragnesh.patel@sifive.com>
cc: Green Wan <green.wan@sifive.com>
2021-07-06 13:48:48 +08:00
Tom Rini
2bba78076b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 10:17:29 -04:00
Tom Rini
80da2453e1 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07 08:09:35 -04:00
Green Wan
70415e1e52 board: sifive: add HiFive Unmatched board support
Add defconfig and board support for HiFive Unmatched.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31 16:35:55 +08:00