Clean the function up slightly by using clrsetbits_le32() to flip
bits in registers instead of cryptic bitmasks. Zap condition checking
for PHY_DEBUG_IN_DEBUG_MODE flag, which is never set. Split the
calibration report into separate debug_mem_calibrate() function.
Signed-off-by: Marek Vasut <marex@denx.de>
Init both structures with zeroes and zap all those zeroing shenanigans
further down in the sdram_calibration_full().
Signed-off-by: Marek Vasut <marex@denx.de>
Clean the function up by getting rid of all the insane XOR-leftshift
combos when assembling register values. While at it, remove all the
ad-hoc variables necessary for this XOR-leftshift voodoo. Finally,
get rid of the iterative division implementation of two constants
and replace it with a DIV_ROUND_UP() macro :-)
Signed-off-by: Marek Vasut <marex@denx.de>
Contemporary CPUs can perform division just fine, use this
functionality and zap another implementation of iterative
division :-)
Signed-off-by: Marek Vasut <marex@denx.de>
Factor out almost common code from rw_mgr_mem_handoff() and
rw_mgr_mem_initialize() into separate rw_mgr_mem_load_user().
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Clean the DQS and OCT parts of the function, clean up the chopped
formatting strings in debug_cond() and slightly improve the code.
Zap group_bgn argument as it is used only in debug messages. Document
the function using kerneldoc. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Apparently, in case of the DQ and DM, the value if the new_delay variable
is calculated, but the value is not used. Zap the entire code which does
calculate the value.
It is not clear to me whether or not the code is doing the right thing
in the first place. Right now, it calls scc_mgr_load_dq() and
scc_mgr_load_dm() respectively, but I suspect it might need to call
scc_mgr_apply_group_dq_out1_delay() and scc_mgr_apply_group_dm_out1_delay()
instead. This is something Altera must investigate.
Signed-off-by: Marek Vasut <marex@denx.de>
First, zap unused argument of the function. Next, clean up
the data types, constify where applicable, clean up comments
and add kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Move scc_mgr_set_hhp_extras() out of scc_set_bypass_mode() as it
has nothing to do in there. Instead, invoke it from mem_calibrate()
just before invoking scc_set_bypass_mode().
Signed-off-by: Marek Vasut <marex@denx.de>
Minor coding style cleanup for this function. Furthermore, move
ad-hoc debug_cond() calls from the only location from where this
function is invoked into this actual function.
Signed-off-by: Marek Vasut <marex@denx.de>
Make this function more readable, no functional change. Also, zap the
forward declaration, which is no longer needed.
Signed-off-by: Marek Vasut <marex@denx.de>
Implement universal scc_mgr_set_all_ranks() function and convert
various ad-hoc implementations of similar functionality to use
this single function. Document the function in kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Implement unified scc_mgr_set() function and convert all those
9 scc_mgr_set_*() ad-hoc functions to call this one function.
Signed-off-by: Marek Vasut <marex@denx.de>
This patch just puts functions which look similar next to each
other, so they can be sorted out. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Turn the insides of these functions into trivial clrsetbits_le32()
and fix the data type of their argument to reflect it's actual size.
Signed-off-by: Marek Vasut <marex@denx.de>
Remove the remaining invocations of sdr_get_addr() and the function
itself. This makes the code a bit less cryptic.
Signed-off-by: Marek Vasut <marex@denx.de>
The debug messages missed proper newlines and/or spaces in them.
Fix the formatting.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
It is the configuration data that should go into the register,
not the register mask, just like the surrounding code does it.
Fix this typo.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
Move the structure prototype from sdram.h header file into sdram.c
source file, since it is used only there and for local purpose only.
There is no point in having it global.
While at this move, fix the data types in the structure from uintNN_t
to uNN and fix the coding style a bit.
Signed-off-by: Marek Vasut <marex@denx.de>
This patch enables the SDRAM controller that is used on Altera's SoCFPGA
family. This patch configures the SDRAM controller based on a configuration
file that is generated from the Quartus tool, sdram_config.h.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
By default the bstopre value has been set to 0x100, used to be 1/4
value of refint. Modern DDR has increased the refresh time. Adjust
to 1/4 of refresh interval dynamically. Individual board can still
override this value in board ddr file, or to use auto-precharge.
Signed-off-by: York Sun <yorksun@freescale.com>
