Remove dead code that was obviously a left-over from copy & paste.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Now that we have 3 boards for the MPC512x it turns out that they all
use the very same fixed_sdram() code.
This patch factors out this common code into cpu/mpc512x/fixed_sdram.c
and adds a new header file, include/asm-ppc/mpc512x.h, with some
macros, inline functions and prototype definitions specific to MPC512x
systems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
The mecp5123 board did not compile because the MSCAN Clock Control
Registers were missing; these got added, but as an array instead
of 4 individual registers. Adapt the code so it builds.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
When enabling NAND support for a board, one must also define
CONFIG_SYS_64BIT_VSPRINTF because this is needed in nand_util.c
for correct output.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.
e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.
Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.
This patch is tested with SST39LF040.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Stefan Roese <sr@denx.de>
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Pandora is using both SDRC CSes. The MUX setting is needed
for the second CS clock signal to allow the 2 RAM parts to
be put in self-refresh correctly.
Based on similar patch for beagle and overo by
Jean Pihet and Steve Sakoman.
Set pullups or pulldowns for GPIOs which need them.
Disable them for others, which have external pulls.
Also make disabled pull setting consistent (some pins had
type set to "up" even if pull type selection was disabled).
Setup pin mux for GPIO pins connected on rev3 or later
boards. Also change NUB2 IRQ pin. This should not affect
older boards because they don't have any nubs (analog
controllers) attached to them.
ehci-hcd.c: In function 'ehci_submit_root':
ehci-hcd.c:719: warning: value computed is not used
ehci-hcd.c:748: warning: value computed is not used
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
ESPT-Giga is SH7763-based reference board.
Board support is relatively sparse, presently supporting serial,
gigabit ethernet, USB host, and MTD.
More information (in Japanese) available at:
http://www.cente.jp/product/cente_hard/ESPT-Giga.html
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Remove symlinking of files located outside api_examples/
* Auto generate dependencies for files located outside api_examples/
* Update names of variables to be similar to those in tools/Makefile
* Fix out of tree build error
Dependencies are calculated for all files in the SRCS variable.
Previously, the SRCS variable contained files which were symlinked
into the api_examples/ directory. These symlinked files did not exist
when dependencies were calculated when building out of tree. This
resulted in errors such as:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/api_examples/.depend', needed by `_depend'. Stop.
make[1]: Leaving directory `/home/wd/git/u-boot/work/api_examples'
make: *** [depend] Error 2
Since symlinked source files are no longer used, this bug no longer
exists.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
This cleans up the Makefile a bit and simplifies future changes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Add support for the Phytec phyCORE-MPC5200B-tiny.
Code originally from Pengutronix.de.
Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on
Timer 0/1
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
The current kallsyms code is using \\0 to escape the backslash in the awk
code, but the shell too needs escaping. This way we make sure gcc is
passed the \0. Then gcc itself will consume this as an octal, so we have
to use 000 so gcc will create the final NUL.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The cm-bf561 module can easily hook up to the EXT-BF5xx-USB-ETH2 extender
board, so add a simple example of how to do that in the board config.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The latest blackstamp boards can only run the SPI flash at 15MHz before
they start to crap out, so lower the max speeds accordingly. The new SPI
flash also has different sector requirements, so update the environment
sizes as well.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
