Commit Graph

16779 Commits

Author SHA1 Message Date
Peng Fan
1d293e6804 imx: add i.MX6ULZ board
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
81ae46c2e6 imx: add i.MX6ULZ cpu type
Add i.MX6ULZ cpu type and helper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
939a9644f0 arm: dts: import dts for i.MX6ULZ
Import kernel dts for i.MX6ULZ from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
c158381288 arm: dts: sync dts for i.MX6ULL
Sync kernel dts for i.MX6ULL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
281256c064 arm: dts: sync dts for i.MX6UL
Sync kernel dts for i.MX6UL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Eugeniy Paltsev
2a7232371a NET: DW: fix regression for ARC boards
The commit
642b80d256 ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.

Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-10-07 13:23:49 -04:00
Tom Rini
dac51e9aaf Merge branch 'master' of git://git.denx.de/u-boot-sh
- ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
2019-10-05 20:06:58 -04:00
Adam Ford
5ff1963da3 ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPL
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2.  This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.

Fixes: 8f4691e31a ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-04 12:21:23 -04:00
Andrew F. Davis
29c9db4d98 board: ti: am654: Disable TRNG node for HS devices
On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-04 12:21:23 -04:00
Andrew F. Davis
c9e6c13deb arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-10-04 12:21:23 -04:00
Andy Shevchenko
d905aa8a42 x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
This is reincarnation of the U-Boot

commit 3469bf4274
Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date:   Wed Jan 10 19:40:15 2018 +0200

    x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters

after upstream got eventually the Linux kernel

commit e6e094e053af75cbc164e950814d3d084fb1e698
Author: Juergen Gross <jgross@suse.com>
Date:   Tue Nov 20 08:25:29 2018 +0100

    x86/acpi, x86/boot: Take RSDP address from boot params if available

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-01 18:20:47 +08:00
Marek Vasut
49d5fba81c ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
This patch restores commit c49d0ac38a ("ARM: dts: rmobile: Increase off-on
delay on the SD Vcc regulator"), which was accidentally dropped during DT
resync in commit 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with
Linux 5.0").

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fixes: 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0")
2019-09-30 02:07:02 +02:00
Heiko Stuebner
d46b548290 rockchip: make_fit_atf.py: fix .its generation for a single atf image
The commit 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property
set error") fixed the double-loading of the primary atf-image, but didn't
take into account that there may be rare atf images with only that main
section present.

Right now this will result in a broken its due to the loadables section not
getting closed correctly, so fix that by adapting the guards around the loop.

The guards now protect against 0 segments when the bl31 binary doesn't
contain any section and 1 segment when only a core atf section is present.

Fixes: 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property set error")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28 22:26:32 +08:00
Heiko Stuebner
03f98b75e4 rockchip: misc: read the correct number of bytes from the efuse
Originally the cpuid var the value gets read into was defined as
    u8 cpuid[RK3399_CPUID_LEN];
hence the sizeof(cpuid) would return the correct the correct number
of array elements.

With the move to a separate function cpuid becomes a pointer and
sizeof(cpuid) hence returns the pointer size - 8 in the arm64 case.

We do have the actual id length available as function param so use
it for actual amount of bytes to read.

Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28 22:26:32 +08:00
Michael Trimarchi
f810ea6acb rockchip: rk3288-tinker: Attach missing peripherals at SPL
Tinker board needs to mux all the sdmmc gpio and
activate the regulator connected to bank 7. Remove
all the bank that are not in use and mark them as dm,spl
so-that it would initialize at SPL.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Jagan Teki
891d4d1fca rockchip: spi-boot-order: Trival fix to newline missing
newline \n was missed in fdt_path_offset, error loop.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Jagan Teki
bacad567ac rockchip: rk3288: vyasa: Drop ROCKCHIP_BROM_HELPER selection
ROCKCHIP_BROM_HELPER is selected as if TPL/SPL ROCKCHIP_BACK_TO_BROM
has been defined, so drop the explicit enablement for vyasa board.

This change is supposed to missed during config move to
other locations, and missed to drop the same.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Tom Rini
a9fa70b7b7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
2019-09-16 13:13:45 -04:00
Tom Rini
a314ec1bfd Merge branch 'master' of git://git.denx.de/u-boot-sh 2019-09-15 21:14:26 -04:00
Marek Vasut
a12c90a28d sh: r2dplus: Fix missing PCI range
Add missing PCI range for translating DRAM to bus addresses.
This fixes e.g. PCI NIC interface and allows network to work
in QEMU.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-14 21:28:55 +02:00
Marek Vasut
fa7cff834f sh: Fix SH4 build with GCC versions without -m4-nofpu
Pass -m4 instead of -m4-nofpu to GCC versions which do not support
the -m4-nofpu option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-14 21:28:55 +02:00
Marek Vasut
e914109de4 sh: Fix incorrect linking with new binutils
Since binutils 2.30 , the resulting U-Boot binary was incorrectly linked
against address 0 instead of text base, fix it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-14 21:28:54 +02:00
Faiz Abbas
16f14b930d ARM: dts: dra74x: Fix iodelay configuration for mmc3
According to the latest am572x[1] and dra74x[2] data manuals, mmc3
default, hs, sdr12 and sdr25 modes use iodelay values given in
MMC3_MANUAL1. Set the MODE_SELECT bit for these so that manual mode is
selected and correct iodelay values are configured.

[1] http://www.ti.com/lit/ds/symlink/am5728.pdf
[2] http://www.ti.com/lit/ds/symlink/dra746.pdf

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-09-13 11:56:30 -04:00
Lokesh Vutla
78e512129b arm: k3: Use get_ti_sci_handle() where ever possible
Instead of calling uclass apis everywhere, use get_ti_sci_handle()
when ever ti_sci is needed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13 11:56:30 -04:00
Lokesh Vutla
e8d3a18639 arm: k3: Fix getting ti_sci handle
API get_ti_sci_handle() is relying on the device-tree node name
to be "dmsc" for probing the ti_sci device. But with the introduction
of debug messages for dmsc, the node name changed to dmsc@44083000.
Because of this ti_sci is never probed cause a boot failure. Instead
of relying on device-tree node name, use the first available firmware
node for probing ti_sci.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13 11:56:30 -04:00
Adam Ford
ca62f2ba15 ARM: omapl138_lcdk: Enable DM_GPIO and DM and GPIO Commands
The da8xx GPIO driver is available with DM_GPIO support.  This
patch enables the CMD_GPIO, CMD_DM, and DM_GPIO and DA8XX_GPIO.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-09-13 11:56:08 -04:00
Suniel Mahesh
d60eb8e49e arm: am437x: cm-t43: Add device tree, enable OF_CONTROL
Add device tree from Linux for driver model conversion
and enable OF_CONTROL. This will remove the following compile
warning:
==================================================
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=<device_tree>' argument
===================================================
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-09-13 11:56:08 -04:00
Hou Zhiqiang
116f75c7b3 armv8: ls1028a: Updated serdes configuration for 0x13BB
In SerDes protocol 0x13BB, lane C was erroneously assigned
to PCIE1, this is now updated to PCIE2

Fixes: 36f50b7523 ("armv8: ls1028a: Add other serdes
		     protocal support")

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Hou Zhiqiang
c9ba88bafc armv8: fsl-layerscape: Fix typo in Layerscape PCIe config entry
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this
typo results in skipping the fixup of Linux PCIe DT nodes.

Also enable the fixup when Layerscape Gen4 controller driver
is enabled.

Fixes: 4da0e52c9d (armv8: fsl-layerscape: fix config dependency
		     for layerscape pci code)

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Chuanhua Han
2f2a19757b armv8: fsl-layerscape: Update I2C clock divider
By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Thomas Schaefer
0490cab584 armv8: ls1028a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Alex Marginean
a3ce94b602 arm: dts: ls1028a-qds: define the MDIO MUX
Add the device-tree structure describing the MUX in board dts.

QDS board has an on-board RGMII PHY and 4 slots for extension cards.
All these can be accessed over MDIO through a MDIO MUX controlled
over I2C.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:31 +05:30
Yinbo Zhu
23da111d5f dts: armv8: add emmc hs200 support for ls1028ardb
Add emmc hs200 support for ls1028ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:04:43 +05:30
Yinbo Zhu
0f021c8bde dts: armv8: add emmc hs200 support for lx2160ardb
Add emmc hs200 support for lx2160ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:04:09 +05:30
Yinbo Zhu
be852314dc dts: armv8: add emmc hs200 support for ls1012ardb
Add emmc hs200 support for ls1012ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:03:10 +05:30
Yinbo Zhu
24cb6f2295 fsl-layerscape: Add fsl_esdhc peripheral clock support
Add esdhc peripheral clock support
for NXP layerscape platforms: LS1046ARDB, LS1043ARDB,
LS1012ARDB, LS1028ARDB, LS1088ARDB, LX2160ARDB

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:00:35 +05:30
Kever Yang
c9ec5fe018 rockchip: clean makefile for misc.c
Use obj-$(config) instead of #ifdef $config to make the code looks
clean, and move the misc_init for U-Boot proper only.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
45f8b55eca rockchip: not depends on TPL_BUILD for rk3188 makefile including
The rk3188/Makefile already depends on !TPL_BUILD, so no need to add
this again in parent Makefile, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
86b4a6db68 rockchip: rk3399: dts: add boot order for rockpro64
The rk3399 rockpro64 board can boot from emmc and sdcard.
TODO: add spiflash as boot device.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Andy Shevchenko
dd4faa964f x86: tangier: Use spaces over TABs in ASL code
For sake of consistency use spaces over TABs in ASL code.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 16:19:03 +08:00
Andy Shevchenko
980fe1ab2a x86: tangier: Fix off-by-one error when preparing CSRT
Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
Due to nature of the binary number representation the maximum value is
2^17 - 1. The original code misses the latter part in equation.

Fixes: 5e99fde34a ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 16:19:03 +08:00
Andy Shevchenko
0c6352ec2a x86: tangier: Reserve PCI ECAM in motherboard resources
Per PCI firmware specification the ACPI has to reserve the memory
which is defined as PCI ECAM.

Fixes: 39665beed6 ("x86: tangier: Enable ACPI support for Intel Tangier")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 16:19:03 +08:00
Andy Shevchenko
19b6e1ba8c x86: acpi: Annotate struct acpi_table_header with __packed
GCC 9.2 starts complaining about possible pointer misalignment of
pointers to the unpacked (alignment=4) structures in the packed
(alignment=1) ones:

  CC      arch/x86/cpu/tangier/acpi.o
arch/x86/cpu/tangier/acpi.c: In function ‘acpi_create_fadt’:
arch/x86/cpu/tangier/acpi.c:22:37: warning: taking address of packed
member of ‘struct acpi_fadt’ may result in an unaligned pointer value
[-Waddress-of-packed-member]
  22 |  struct acpi_table_header *header = &(fadt->header);

  CC      arch/x86/lib/acpi_table.o
arch/x86/lib/acpi_table.c: In function ‘acpi_create_spcr’:
arch/x86/lib/acpi_table.c:366:37: warning: taking address of packed
member of ‘struct acpi_spcr’ may result in an unaligned pointer value
[-Waddress-of-packed-member]
  366 |  struct acpi_table_header *header = &(spcr->header);

Fix the potential issues by annotating embedded structures with
__packed even though they are packed naturally.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add GCC version number in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 16:17:55 +08:00
Park, Aiden
5793553fa2 x86: efi_loader: Use efi_add_conventional_memory_map()
Use efi_add_conventional_memory_map() to configure EFI conventional memory
properly with ram_top value. This will give 32-bit mode U-Boot proper
conventional memory regions even if e820 has an entry which is greater than
32-bit address space.

Signed-off-by: Aiden Park <aiden.park@intel.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[bmeng: fixed some typos in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 14:31:42 +08:00
Heinrich Schuchardt
74b76357df x86: show UEFI images involved in crash
If a crash occurs, show the loaded UEFI images to facilitate analysis.

This is an example output:

=> bootefi 0x1000000
Found 0 disks
Hello world of bugs!
Invalid Opcode (Undefined Opcode)
EIP: 0010:[<06ceb06e>] EFLAGS: 00010206
Original EIP :[<fec9906e>]
EAX: 00000000 EBX: 06cec000 ECX: 00000fd0 EDX: 00000001
ESI: 06ced18a EDI: 07d0fe10 EBP: 07fe27a0 ESP: 07d0fde0
 DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018
CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: ffff0ff0 DR7: 00000400
Stack:
    0x07d0fde8 : 0x00000000
    0x07d0fde4 : 0x06ced040
--->0x07d0fde0 : 0x07fe27a0
    0x07d0fddc : 0x00010206
    0x07d0fdd8 : 0x00000010
    0x07d0fdd4 : 0x06ceb06e
UEFI image [0x06cea000:0x06cf0fff] pc=0x106e '/bug-i386.efi'
### ERROR ### Please RESET the board ###

With the additional information provided by this patch we know that the
problem occurred 0x106e after the load address of bug-i386.efi.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 14:27:15 +08:00
Bin Meng
2495c3a3fd x86: qemu: Report high memory in the E820 table
Now that we are able to get the size of high memory from QEMU,
report its memory range as usable ram.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
2019-09-10 14:19:39 +08:00
Bin Meng
ea67d549b8 x86: qemu: Support getting high memory size
At present only size of memory that is below 4GiB is retrieved from
QEMU. Add a function that gets size of memory that is above 4GiB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
2019-09-10 14:19:39 +08:00
Bin Meng
f4c0030074 x86: qemu: Extract getting memory size to a separate routine
This extracts getting memory size logic in dram_init() to a separate
routine qemu_get_low_memory_size(). No functional changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
2019-09-10 14:19:39 +08:00
Bin Meng
d2860c0088 x86: Drop weak version board_get_usable_ram_top()
Every x86 platform provides board_get_usable_ram_top(), hence there
is no need to provide a weak version board_get_usable_ram_top(), not
to mention there is another weak version board_get_usable_ram_top()
in common/board_f.c.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Aiden Park <aiden.park@intel.com>
2019-09-10 14:19:39 +08:00
Andy Shevchenko
03f78868ae x86: acpi: Slightly reduce binary size of ACPI tables for Tangier
Using ACPI predefined macros, such as Zero or One, will reduce a binary
size of resulting ACPI tables.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: manually fixed the conflicts when applying]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 14:19:39 +08:00