nios2: Switch to generic timer
Zap almost all of the ad-hoc timer code from interrupts.c and use the code in lib/time.c instead. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
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Thomas Chou
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51068bcfc9
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fea7f3aa3e
@ -8,7 +8,6 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/nios2.h>
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#include <asm/types.h>
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#include <asm/io.h>
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@ -20,14 +19,14 @@
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#include <status_led.h>
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#endif
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typedef volatile struct {
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unsigned status; /* Timer status reg */
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unsigned control; /* Timer control reg */
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unsigned periodl; /* Timeout period low */
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unsigned periodh; /* Timeout period high */
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unsigned snapl; /* Snapshot low */
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unsigned snaph; /* Snapshot high */
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} nios_timer_t;
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struct nios_timer {
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u32 status; /* Timer status reg */
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u32 control; /* Timer control reg */
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u32 periodl; /* Timeout period low */
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u32 periodh; /* Timeout period high */
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u32 snapl; /* Snapshot low */
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u32 snaph; /* Snapshot high */
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};
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/* status register */
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#define NIOS_TIMER_TO (1 << 0) /* Timeout */
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@ -39,8 +38,8 @@ typedef volatile struct {
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#define NIOS_TIMER_START (1 << 2) /* Start timer */
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#define NIOS_TIMER_STOP (1 << 3) /* Stop timer */
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#if defined(CONFIG_SYS_NIOS_TMRBASE) && !defined(CONFIG_SYS_NIOS_TMRIRQ)
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#error CONFIG_SYS_NIOS_TMRIRQ not defined (see documentation)
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#if defined(CONFIG_SYS_TIMER_BASE) && !defined(CONFIG_SYS_TIMER_IRQ)
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#error CONFIG_SYS_TIMER_IRQ not defined (see documentation)
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#endif
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/****************************************************************************/
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@ -54,80 +53,15 @@ struct irq_action {
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static struct irq_action vecs[32];
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/*************************************************************************/
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volatile ulong timestamp = 0;
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void reset_timer (void)
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{
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nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
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/* From Embedded Peripherals Handbook:
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*
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* "When the hardware is configured with Writeable period
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* disabled, writing to one of the period_n registers causes
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* the counter to reset to the fixed Timeout Period specified
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* at system generation time."
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*
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* Here we force a reload to prevent early timeouts from
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* get_timer() when the interrupt period is greater than
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* than 1 msec.
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*
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* Simply write to periodl with its own value to force an
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* internal counter reload, THEN reset the timestamp.
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*/
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writel (readl (&tmr->periodl), &tmr->periodl);
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timestamp = 0;
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/* From Embedded Peripherals Handbook:
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*
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* "Writing to one of the period_n registers stops the internal
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* counter, except when the hardware is configured with Start/Stop
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* control bits off. If Start/Stop control bits is off, writing
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* either register does not stop the counter."
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*
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* In order to accomodate either configuration, the control
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* register is re-written. If the counter is stopped, it will
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* be restarted. If it is running, the write is essentially
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* a nop.
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*/
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writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
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&tmr->control);
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}
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ulong get_timer (ulong base)
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{
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WATCHDOG_RESET ();
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return (timestamp - base);
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}
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static volatile ulong timestamp;
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/*
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* This function is derived from Blackfin code (read timebase as long long).
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* On Nios2 it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from Blackfin code.
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* On Nios2 it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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ulong tbclk;
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tbclk = CONFIG_SYS_HZ;
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return tbclk;
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}
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/* The board must handle this interrupt if a timer is not
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* The board must handle this interrupt if a timer is not
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* provided.
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*/
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#if defined(CONFIG_SYS_NIOS_TMRBASE)
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void tmr_isr (void *arg)
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{
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nios_timer_t *tmr = (nios_timer_t *)arg;
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struct nios_timer *tmr = (struct nios_timer *)arg;
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/* Interrupt is cleared by writing anything to the
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* status register.
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*/
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@ -138,24 +72,38 @@ void tmr_isr (void *arg)
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#endif
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}
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static void tmr_init (void)
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unsigned long notrace timer_read_counter(void)
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{
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nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
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struct nios_timer *tmr = (struct nios_timer *)CONFIG_SYS_TIMER_BASE;
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u32 val;
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/* Trigger update */
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writel(0x0, &tmr->snapl);
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/* Read timer value */
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val = readl(&tmr->snapl) & 0xffff;
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val |= (readl(&tmr->snaph) & 0xffff) << 16;
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return ~val;
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}
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int timer_init(void)
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{
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struct nios_timer *tmr = (struct nios_timer *)CONFIG_SYS_TIMER_BASE;
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writel (0, &tmr->status);
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writel (0, &tmr->control);
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writel (NIOS_TIMER_STOP, &tmr->control);
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#if defined(CONFIG_SYS_NIOS_TMRCNT)
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writel (CONFIG_SYS_NIOS_TMRCNT & 0xffff, &tmr->periodl);
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writel ((CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff, &tmr->periodh);
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#endif
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writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
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&tmr->control);
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irq_install_handler (CONFIG_SYS_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
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}
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writel (0xffff, &tmr->periodl);
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writel (0xffff, &tmr->periodh);
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#endif /* CONFIG_SYS_NIOS_TMRBASE */
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writel (NIOS_TIMER_CONT | NIOS_TIMER_START, &tmr->control);
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/* FIXME */
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irq_install_handler(CONFIG_SYS_TIMER_IRQ, tmr_isr, (void *)tmr);
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return 0;
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}
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/*************************************************************************/
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int disable_interrupts (void)
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@ -245,10 +193,6 @@ int interrupt_init (void)
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vecs[i].count = 0;
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}
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#if defined(CONFIG_SYS_NIOS_TMRBASE)
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tmr_init ();
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#endif
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enable_interrupts ();
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return (0);
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}
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@ -8,4 +8,3 @@
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obj-y += cache.o
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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obj-y += libgcc.o
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obj-y += time.o
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@ -1,22 +0,0 @@
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/*
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* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <watchdog.h>
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extern void dly_clks( unsigned long ticks );
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void __udelay(unsigned long usec)
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{
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/* The Nios core doesn't have a timebase, so we do our
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* best for now and call a low-level loop that counts
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* cpu clocks.
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*/
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unsigned long cnt = (CONFIG_SYS_CLK_FREQ/1000000) * usec;
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dly_clks (cnt);
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}
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@ -795,7 +795,8 @@ static init_fnc_t init_sequence_f[] = {
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init_timebase,
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#endif
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#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
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defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
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defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
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defined(CONFIG_NIOS2)
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timer_init, /* initialize timer */
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#endif
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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@ -39,12 +39,8 @@
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/*
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* TIMER
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*/
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#define CONFIG_SYS_LOW_RES_TIMER
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#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_TIMER_BASE
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#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_TIMER_IRQ
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#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
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#define CONFIG_SYS_NIOS_TMRCNT \
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(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_TIMER_FREQ / 1000) - 1)
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#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TIMER_FREQ
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#define CONFIG_SYS_NIOS_TMRMS 10 /* FIXME: Desired period (msec)*/
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/*
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* STATUS LED
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