exynos5: pinmux: check flag for i2c config
Some versions of Exynos5 supports High-Speed I2C, on few interfaces, this change allows support this. The new flag is: PINMUX_FLAG_HS_MODE Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
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@ -266,22 +266,33 @@ static void exynos5_sromc_config(int flags)
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static void exynos5_i2c_config(int peripheral, int flags)
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{
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int func01, func23;
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/* High-Speed I2C */
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if (flags & PINMUX_FLAG_HS_MODE) {
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func01 = 4;
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func23 = 4;
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} else {
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func01 = 2;
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func23 = 3;
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}
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switch (peripheral) {
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case PERIPH_ID_I2C0:
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gpio_cfg_pin(EXYNOS5_GPIO_B30, S5P_GPIO_FUNC(0x2));
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gpio_cfg_pin(EXYNOS5_GPIO_B31, S5P_GPIO_FUNC(0x2));
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gpio_cfg_pin(EXYNOS5_GPIO_B30, S5P_GPIO_FUNC(func01));
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gpio_cfg_pin(EXYNOS5_GPIO_B31, S5P_GPIO_FUNC(func01));
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break;
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case PERIPH_ID_I2C1:
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gpio_cfg_pin(EXYNOS5_GPIO_B32, S5P_GPIO_FUNC(0x2));
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gpio_cfg_pin(EXYNOS5_GPIO_B33, S5P_GPIO_FUNC(0x2));
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gpio_cfg_pin(EXYNOS5_GPIO_B32, S5P_GPIO_FUNC(func01));
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gpio_cfg_pin(EXYNOS5_GPIO_B33, S5P_GPIO_FUNC(func01));
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break;
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case PERIPH_ID_I2C2:
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gpio_cfg_pin(EXYNOS5_GPIO_A06, S5P_GPIO_FUNC(0x3));
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gpio_cfg_pin(EXYNOS5_GPIO_A07, S5P_GPIO_FUNC(0x3));
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gpio_cfg_pin(EXYNOS5_GPIO_A06, S5P_GPIO_FUNC(func23));
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gpio_cfg_pin(EXYNOS5_GPIO_A07, S5P_GPIO_FUNC(func23));
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break;
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case PERIPH_ID_I2C3:
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gpio_cfg_pin(EXYNOS5_GPIO_A12, S5P_GPIO_FUNC(0x3));
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gpio_cfg_pin(EXYNOS5_GPIO_A13, S5P_GPIO_FUNC(0x3));
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gpio_cfg_pin(EXYNOS5_GPIO_A12, S5P_GPIO_FUNC(func23));
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gpio_cfg_pin(EXYNOS5_GPIO_A13, S5P_GPIO_FUNC(func23));
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break;
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case PERIPH_ID_I2C4:
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gpio_cfg_pin(EXYNOS5_GPIO_A20, S5P_GPIO_FUNC(0x3));
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@ -23,6 +23,9 @@ enum {
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/* Flags for SROM controller */
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PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */
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PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */
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/* Flags for I2C */
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PINMUX_FLAG_HS_MODE = 1 << 1, /* I2C High Speed Mode */
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};
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/**
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