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fixed ethernet phy configuration for plu405 board

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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This commit is contained in:
Matthias Fuchs 2007-03-07 15:32:01 +01:00 committed by Stefan Roese
parent 35ded29fd9
commit f9fc6a5852
2 changed files with 13 additions and 12 deletions
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17
board/esd/plu405/plu405.c
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@ -215,12 +215,6 @@ int checkboard (void)
} }
putc ('\n'); putc ('\n');
/*
* Disable sleep mode in LXT971
*/
lxt971_no_sleep();
return 0; return 0;
} }
@ -292,3 +286,14 @@ void board_auto_update_show(int au_active)
} }
} }
#endif #endif
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
/*
* Disable sleep mode in LXT971
*/
lxt971_no_sleep();
#endif
}

8
include/configs/PLU405.h
View File

@ -51,17 +51,13 @@
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#if 0 /* test-only */
#define CONFIG_NET_MULTI 1 #define CONFIG_NET_MULTI 1
#undef CONFIG_HAS_ETH1
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_PHY1_ADDR 1 /* PHY address */
#else
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#endif
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/