Merge branch 'master' of http://git.denx.de/u-boot-mmc
This commit is contained in:
commit
f85fad024f
@ -120,9 +120,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
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|
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if (host->fifo_mode && size) {
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if (host->fifo_mode && size) {
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len = 0;
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len = 0;
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if (data->flags == MMC_DATA_READ) {
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if (data->flags == MMC_DATA_READ &&
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if ((dwmci_readl(host, DWMCI_RINTSTS) &
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(mask & DWMCI_INTMSK_RXDR)) {
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DWMCI_INTMSK_RXDR)) {
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while (size) {
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len = dwmci_readl(host, DWMCI_STATUS);
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len = dwmci_readl(host, DWMCI_STATUS);
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len = (len >> DWMCI_FIFO_SHIFT) &
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len = (len >> DWMCI_FIFO_SHIFT) &
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DWMCI_FIFO_MASK;
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DWMCI_FIFO_MASK;
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@ -130,12 +130,13 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
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for (i = 0; i < len; i++)
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for (i = 0; i < len; i++)
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*buf++ =
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*buf++ =
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dwmci_readl(host, DWMCI_DATA);
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dwmci_readl(host, DWMCI_DATA);
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dwmci_writel(host, DWMCI_RINTSTS,
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size = size > len ? (size - len) : 0;
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DWMCI_INTMSK_RXDR);
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}
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}
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} else {
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dwmci_writel(host, DWMCI_RINTSTS,
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if ((dwmci_readl(host, DWMCI_RINTSTS) &
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DWMCI_INTMSK_RXDR);
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DWMCI_INTMSK_TXDR)) {
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} else if (data->flags == MMC_DATA_WRITE &&
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(mask & DWMCI_INTMSK_TXDR)) {
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while (size) {
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len = dwmci_readl(host, DWMCI_STATUS);
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len = dwmci_readl(host, DWMCI_STATUS);
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len = fifo_depth - ((len >>
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len = fifo_depth - ((len >>
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DWMCI_FIFO_SHIFT) &
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DWMCI_FIFO_SHIFT) &
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@ -144,11 +145,11 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
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for (i = 0; i < len; i++)
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for (i = 0; i < len; i++)
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dwmci_writel(host, DWMCI_DATA,
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dwmci_writel(host, DWMCI_DATA,
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*buf++);
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*buf++);
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dwmci_writel(host, DWMCI_RINTSTS,
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size = size > len ? (size - len) : 0;
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DWMCI_INTMSK_TXDR);
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}
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}
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dwmci_writel(host, DWMCI_RINTSTS,
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DWMCI_INTMSK_TXDR);
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}
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}
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size = size > len ? (size - len) : 0;
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}
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}
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/* Data arrived correctly. */
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/* Data arrived correctly. */
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@ -21,6 +21,14 @@
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#include <div64.h>
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#include <div64.h>
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#include "mmc_private.h"
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#include "mmc_private.h"
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static const unsigned int sd_au_size[] = {
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0, SZ_16K / 512, SZ_32K / 512,
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SZ_64K / 512, SZ_128K / 512, SZ_256K / 512,
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SZ_512K / 512, SZ_1M / 512, SZ_2M / 512,
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SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
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SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512,
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};
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#ifndef CONFIG_DM_MMC_OPS
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#ifndef CONFIG_DM_MMC_OPS
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__weak int board_mmc_getwp(struct mmc *mmc)
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__weak int board_mmc_getwp(struct mmc *mmc)
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{
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{
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@ -945,6 +953,62 @@ retry_scr:
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return 0;
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return 0;
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}
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}
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static int sd_read_ssr(struct mmc *mmc)
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{
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int err, i;
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struct mmc_cmd cmd;
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ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
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struct mmc_data data;
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int timeout = 3;
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unsigned int au, eo, et, es;
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cmd.cmdidx = MMC_CMD_APP_CMD;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = mmc->rca << 16;
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err = mmc_send_cmd(mmc, &cmd, NULL);
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if (err)
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return err;
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cmd.cmdidx = SD_CMD_APP_SD_STATUS;
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cmd.resp_type = MMC_RSP_R1;
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cmd.cmdarg = 0;
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retry_ssr:
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data.dest = (char *)ssr;
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data.blocksize = 64;
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data.blocks = 1;
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data.flags = MMC_DATA_READ;
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err = mmc_send_cmd(mmc, &cmd, &data);
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if (err) {
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if (timeout--)
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goto retry_ssr;
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return err;
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}
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for (i = 0; i < 16; i++)
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ssr[i] = be32_to_cpu(ssr[i]);
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au = (ssr[2] >> 12) & 0xF;
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if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
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mmc->ssr.au = sd_au_size[au];
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es = (ssr[3] >> 24) & 0xFF;
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es |= (ssr[2] & 0xFF) << 8;
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et = (ssr[3] >> 18) & 0x3F;
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if (es && et) {
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eo = (ssr[3] >> 16) & 0x3;
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mmc->ssr.erase_timeout = (et * 1000) / es;
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mmc->ssr.erase_offset = eo * 1000;
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}
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} else {
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debug("Invalid Allocation Unit Size.\n");
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}
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return 0;
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}
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/* frequency bases */
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/* frequency bases */
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/* divided by 10 to be nice to platforms without floating point */
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/* divided by 10 to be nice to platforms without floating point */
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static const int fbase[] = {
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static const int fbase[] = {
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@ -1350,6 +1414,10 @@ static int mmc_startup(struct mmc *mmc)
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mmc_set_bus_width(mmc, 4);
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mmc_set_bus_width(mmc, 4);
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}
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}
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err = sd_read_ssr(mmc);
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if (err)
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return err;
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if (mmc->card_caps & MMC_MODE_HS)
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if (mmc->card_caps & MMC_MODE_HS)
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mmc->tran_speed = 50000000;
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mmc->tran_speed = 50000000;
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else
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else
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@ -100,8 +100,13 @@ unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start,
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& ~(mmc->erase_grp_size - 1)) - 1);
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& ~(mmc->erase_grp_size - 1)) - 1);
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while (blk < blkcnt) {
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while (blk < blkcnt) {
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blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
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if (IS_SD(mmc) && mmc->ssr.au) {
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mmc->erase_grp_size : (blkcnt - blk);
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blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
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mmc->ssr.au : (blkcnt - blk);
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} else {
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blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
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mmc->erase_grp_size : (blkcnt - blk);
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}
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err = mmc_erase_t(mmc, start + blk, blk_r);
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err = mmc_erase_t(mmc, start + blk, blk_r);
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if (err)
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if (err)
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break;
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break;
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@ -121,13 +121,10 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
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* for card ready state.
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* for card ready state.
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* Every time when card is busy after timeout then (last) timeout value will be
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* Every time when card is busy after timeout then (last) timeout value will be
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* increased twice but only if it doesn't exceed global defined maximum.
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* increased twice but only if it doesn't exceed global defined maximum.
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* Each function call will use last timeout value. Max timeout can be redefined
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* Each function call will use last timeout value.
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* in board config file.
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*/
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*/
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#ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT
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#define SDHCI_CMD_MAX_TIMEOUT 3200
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#define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200
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#define SDHCI_CMD_DEFAULT_TIMEOUT 100
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#endif
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#define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100
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#define SDHCI_READ_STATUS_TIMEOUT 1000
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#define SDHCI_READ_STATUS_TIMEOUT 1000
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#ifdef CONFIG_DM_MMC_OPS
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#ifdef CONFIG_DM_MMC_OPS
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@ -151,7 +148,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
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unsigned start = get_timer(0);
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unsigned start = get_timer(0);
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/* Timeout unit - ms */
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/* Timeout unit - ms */
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static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT;
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static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
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sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
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sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
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mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
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mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
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@ -164,7 +161,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
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while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
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while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
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if (time >= cmd_timeout) {
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if (time >= cmd_timeout) {
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printf("%s: MMC: %d busy ", __func__, mmc_dev);
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printf("%s: MMC: %d busy ", __func__, mmc_dev);
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if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
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if (2 * cmd_timeout <= SDHCI_CMD_MAX_TIMEOUT) {
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cmd_timeout += cmd_timeout;
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cmd_timeout += cmd_timeout;
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printf("timeout increasing to: %u ms.\n",
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printf("timeout increasing to: %u ms.\n",
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cmd_timeout);
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cmd_timeout);
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@ -297,7 +294,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
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static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
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static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
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{
|
{
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struct sdhci_host *host = mmc->priv;
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struct sdhci_host *host = mmc->priv;
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unsigned int div, clk, timeout, reg;
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unsigned int div, clk = 0, timeout, reg;
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||||||
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||||||
/* Wait max 20 ms */
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/* Wait max 20 ms */
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timeout = 200;
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timeout = 200;
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@ -321,14 +318,36 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
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|||||||
return 0;
|
return 0;
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||||||
|
|
||||||
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
||||||
/* Version 3.00 divisors must be a multiple of 2. */
|
/*
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||||||
if (mmc->cfg->f_max <= clock)
|
* Check if the Host Controller supports Programmable Clock
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||||||
div = 1;
|
* Mode.
|
||||||
else {
|
*/
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for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
|
if (host->clk_mul) {
|
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if ((mmc->cfg->f_max / div) <= clock)
|
for (div = 1; div <= 1024; div++) {
|
||||||
|
if ((mmc->cfg->f_max * host->clk_mul / div)
|
||||||
|
<= clock)
|
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break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
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||||||
|
* Set Programmable Clock Mode in the Clock
|
||||||
|
* Control register.
|
||||||
|
*/
|
||||||
|
clk = SDHCI_PROG_CLOCK_MODE;
|
||||||
|
div--;
|
||||||
|
} else {
|
||||||
|
/* Version 3.00 divisors must be a multiple of 2. */
|
||||||
|
if (mmc->cfg->f_max <= clock) {
|
||||||
|
div = 1;
|
||||||
|
} else {
|
||||||
|
for (div = 2;
|
||||||
|
div < SDHCI_MAX_DIV_SPEC_300;
|
||||||
|
div += 2) {
|
||||||
|
if ((mmc->cfg->f_max / div) <= clock)
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
div >>= 1;
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
/* Version 2.00 divisors must be a power of 2. */
|
/* Version 2.00 divisors must be a power of 2. */
|
||||||
@ -336,13 +355,13 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
|
|||||||
if ((mmc->cfg->f_max / div) <= clock)
|
if ((mmc->cfg->f_max / div) <= clock)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
div >>= 1;
|
||||||
}
|
}
|
||||||
div >>= 1;
|
|
||||||
|
|
||||||
if (host->set_clock)
|
if (host->set_clock)
|
||||||
host->set_clock(host->index, div);
|
host->set_clock(host->index, div);
|
||||||
|
|
||||||
clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
|
clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
|
||||||
clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
|
clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
|
||||||
<< SDHCI_DIVIDER_HI_SHIFT;
|
<< SDHCI_DIVIDER_HI_SHIFT;
|
||||||
clk |= SDHCI_CLOCK_INT_EN;
|
clk |= SDHCI_CLOCK_INT_EN;
|
||||||
@ -451,6 +470,8 @@ static int sdhci_init(struct mmc *mmc)
|
|||||||
{
|
{
|
||||||
struct sdhci_host *host = mmc->priv;
|
struct sdhci_host *host = mmc->priv;
|
||||||
|
|
||||||
|
sdhci_reset(host, SDHCI_RESET_ALL);
|
||||||
|
|
||||||
if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
|
if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
|
||||||
aligned_buffer = memalign(8, 512*1024);
|
aligned_buffer = memalign(8, 512*1024);
|
||||||
if (!aligned_buffer) {
|
if (!aligned_buffer) {
|
||||||
@ -514,9 +535,17 @@ static const struct mmc_ops sdhci_ops = {
|
|||||||
int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
|
int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
|
||||||
u32 max_clk, u32 min_clk)
|
u32 max_clk, u32 min_clk)
|
||||||
{
|
{
|
||||||
u32 caps;
|
u32 caps, caps_1;
|
||||||
|
|
||||||
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
||||||
|
|
||||||
|
#ifdef CONFIG_MMC_SDMA
|
||||||
|
if (!(caps & SDHCI_CAN_DO_SDMA)) {
|
||||||
|
printf("%s: Your controller doesn't support SDMA!!\n",
|
||||||
|
__func__);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
|
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
|
||||||
|
|
||||||
cfg->name = host->name;
|
cfg->name = host->name;
|
||||||
@ -534,8 +563,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
|
|||||||
SDHCI_CLOCK_BASE_SHIFT;
|
SDHCI_CLOCK_BASE_SHIFT;
|
||||||
cfg->f_max *= 1000000;
|
cfg->f_max *= 1000000;
|
||||||
}
|
}
|
||||||
if (cfg->f_max == 0)
|
if (cfg->f_max == 0) {
|
||||||
|
printf("%s: Hardware doesn't specify base clock frequency\n",
|
||||||
|
__func__);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
}
|
||||||
if (min_clk)
|
if (min_clk)
|
||||||
cfg->f_min = min_clk;
|
cfg->f_min = min_clk;
|
||||||
else {
|
else {
|
||||||
@ -552,6 +584,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
|
|||||||
if (caps & SDHCI_CAN_VDD_180)
|
if (caps & SDHCI_CAN_VDD_180)
|
||||||
cfg->voltages |= MMC_VDD_165_195;
|
cfg->voltages |= MMC_VDD_165_195;
|
||||||
|
|
||||||
|
if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
|
||||||
|
cfg->voltages |= host->voltages;
|
||||||
|
|
||||||
cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
|
cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
|
||||||
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
||||||
if (caps & SDHCI_CAN_DO_8BIT)
|
if (caps & SDHCI_CAN_DO_8BIT)
|
||||||
@ -564,6 +599,14 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
|
|||||||
|
|
||||||
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* In case of Host Controller v3.00, find out whether clock
|
||||||
|
* multiplier is supported.
|
||||||
|
*/
|
||||||
|
caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
|
||||||
|
host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
|
||||||
|
SDHCI_CLOCK_MUL_SHIFT;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -575,27 +618,11 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg)
|
|||||||
#else
|
#else
|
||||||
int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
|
int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_MMC_SDMA
|
int ret;
|
||||||
unsigned int caps;
|
|
||||||
|
|
||||||
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
ret = sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk);
|
||||||
if (!(caps & SDHCI_CAN_DO_SDMA)) {
|
if (ret)
|
||||||
printf("%s: Your controller doesn't support SDMA!!\n",
|
return ret;
|
||||||
__func__);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk)) {
|
|
||||||
printf("%s: Hardware doesn't specify base clock frequency\n",
|
|
||||||
__func__);
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
|
|
||||||
host->cfg.voltages |= host->voltages;
|
|
||||||
|
|
||||||
sdhci_reset(host, SDHCI_RESET_ALL);
|
|
||||||
|
|
||||||
host->mmc = mmc_create(&host->cfg, host);
|
host->mmc = mmc_create(&host->cfg, host);
|
||||||
if (host->mmc == NULL) {
|
if (host->mmc == NULL) {
|
||||||
|
@ -11,6 +11,7 @@
|
|||||||
#define _MMC_H_
|
#define _MMC_H_
|
||||||
|
|
||||||
#include <linux/list.h>
|
#include <linux/list.h>
|
||||||
|
#include <linux/sizes.h>
|
||||||
#include <linux/compiler.h>
|
#include <linux/compiler.h>
|
||||||
#include <part.h>
|
#include <part.h>
|
||||||
|
|
||||||
@ -102,6 +103,7 @@
|
|||||||
#define SD_CMD_SWITCH_UHS18V 11
|
#define SD_CMD_SWITCH_UHS18V 11
|
||||||
|
|
||||||
#define SD_CMD_APP_SET_BUS_WIDTH 6
|
#define SD_CMD_APP_SET_BUS_WIDTH 6
|
||||||
|
#define SD_CMD_APP_SD_STATUS 13
|
||||||
#define SD_CMD_ERASE_WR_BLK_START 32
|
#define SD_CMD_ERASE_WR_BLK_START 32
|
||||||
#define SD_CMD_ERASE_WR_BLK_END 33
|
#define SD_CMD_ERASE_WR_BLK_END 33
|
||||||
#define SD_CMD_APP_SEND_OP_COND 41
|
#define SD_CMD_APP_SEND_OP_COND 41
|
||||||
@ -392,6 +394,12 @@ struct mmc_config {
|
|||||||
unsigned char part_type;
|
unsigned char part_type;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct sd_ssr {
|
||||||
|
unsigned int au; /* In sectors */
|
||||||
|
unsigned int erase_timeout; /* In milliseconds */
|
||||||
|
unsigned int erase_offset; /* In milliseconds */
|
||||||
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
|
* With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
|
||||||
* with mmc_get_mmc_dev().
|
* with mmc_get_mmc_dev().
|
||||||
@ -426,6 +434,7 @@ struct mmc {
|
|||||||
uint write_bl_len;
|
uint write_bl_len;
|
||||||
uint erase_grp_size; /* in 512-byte sectors */
|
uint erase_grp_size; /* in 512-byte sectors */
|
||||||
uint hc_wp_grp_size; /* in 512-byte sectors */
|
uint hc_wp_grp_size; /* in 512-byte sectors */
|
||||||
|
struct sd_ssr ssr; /* SD status register */
|
||||||
u64 capacity;
|
u64 capacity;
|
||||||
u64 capacity_user;
|
u64 capacity_user;
|
||||||
u64 capacity_boot;
|
u64 capacity_boot;
|
||||||
|
@ -97,6 +97,7 @@
|
|||||||
#define SDHCI_DIV_MASK 0xFF
|
#define SDHCI_DIV_MASK 0xFF
|
||||||
#define SDHCI_DIV_MASK_LEN 8
|
#define SDHCI_DIV_MASK_LEN 8
|
||||||
#define SDHCI_DIV_HI_MASK 0x300
|
#define SDHCI_DIV_HI_MASK 0x300
|
||||||
|
#define SDHCI_PROG_CLOCK_MODE 0x0020
|
||||||
#define SDHCI_CLOCK_CARD_EN 0x0004
|
#define SDHCI_CLOCK_CARD_EN 0x0004
|
||||||
#define SDHCI_CLOCK_INT_STABLE 0x0002
|
#define SDHCI_CLOCK_INT_STABLE 0x0002
|
||||||
#define SDHCI_CLOCK_INT_EN 0x0001
|
#define SDHCI_CLOCK_INT_EN 0x0001
|
||||||
@ -242,6 +243,7 @@ struct sdhci_host {
|
|||||||
unsigned int quirks;
|
unsigned int quirks;
|
||||||
unsigned int host_caps;
|
unsigned int host_caps;
|
||||||
unsigned int version;
|
unsigned int version;
|
||||||
|
unsigned int clk_mul; /* Clock Multiplier value */
|
||||||
unsigned int clock;
|
unsigned int clock;
|
||||||
struct mmc *mmc;
|
struct mmc *mmc;
|
||||||
const struct sdhci_ops *ops;
|
const struct sdhci_ops *ops;
|
||||||
|
Loading…
Reference in New Issue
Block a user