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* Patch by Paul Ruhland, 10 Jun 2004:

Browse Source 
fix support for Logic SDK-LH7A404 board and clean up the
  LH7A404 register macros.

* Patch by Matthew McClintock, 10 Jun 2004:
  Modify code to select correct serial clock on Sandpoint8245
This commit is contained in:
wdenk
2004-06-10 21:55:33 +00:00
parent b54d32b40d
commit f832d8a143
15 changed files with 388 additions and 73 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
cpu/lh7a40x/interrupts.c
View File

@@ -41,7 +41,7 @@ static ulong timer_load_val = 0;
/* macro to read the 16 bit timer */
static inline ulong READ_TIMER(void)
{
LH7A40X_TIMERS_PTR(timers);
lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR;
lh7a40x_timer_t* timer = &timers->timer1;
return (timer->value & 0x0000ffff);
@@ -185,7 +185,7 @@ static ulong lastdec;
int interrupt_init (void)
{
LH7A40X_TIMERS_PTR(timers);
lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR;
lh7a40x_timer_t* timer = &timers->timer1;
/* a periodic timer using the 508kHz source */

10
cpu/lh7a40x/serial.c
View File

@@ -34,7 +34,7 @@
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
LH7A40X_UART_PTR(uart,UART_CONSOLE);
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
int i;
unsigned int reg = 0;
@@ -62,7 +62,7 @@ void serial_setbrg (void)
*/
int serial_init (void)
{
LH7A40X_UART_PTR(uart,UART_CONSOLE);
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
/* UART must be enabled before writing to any config registers */
uart->con |= (UART_EN);
@@ -96,7 +96,7 @@ int serial_init (void)
*/
int serial_getc (void)
{
LH7A40X_UART_PTR(uart,UART_CONSOLE);
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
/* wait for character to arrive */
while (uart->status & UART_RXFE);
@@ -142,7 +142,7 @@ void enable_putc(void)
*/
void serial_putc (const char c)
{
LH7A40X_UART_PTR(uart,UART_CONSOLE);
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
#ifdef CONFIG_MODEM_SUPPORT
if (be_quiet)
@@ -169,7 +169,7 @@ void serial_putc (const char c)
*/
int serial_tstc (void)
{
LH7A40X_UART_PTR(uart,UART_CONSOLE);
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
return(!(uart->status & UART_RXFE));
}

6
cpu/lh7a40x/speed.c
View File

@@ -46,7 +46,7 @@ ulong get_PLLCLK (void)
/* return FCLK frequency */
ulong get_FCLK (void)
{
LH7A40X_CSC_PTR (csc);
lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
ulong maindiv1, maindiv2, prediv, ps;
/*
@@ -68,7 +68,7 @@ ulong get_FCLK (void)
/* return HCLK frequency */
ulong get_HCLK (void)
{
LH7A40X_CSC_PTR (csc);
lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
return (get_FCLK () / ((csc->clkset & CLKSET_HCLKDIV) + 1));
}
@@ -76,7 +76,7 @@ ulong get_HCLK (void)
/* return PCLK frequency */
ulong get_PCLK (void)
{
LH7A40X_CSC_PTR (csc);
lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
return (get_HCLK () /
(1 << (((csc->clkset & CLKSET_PCLKDIV) >> 16) + 1)));