ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
This was never used, is not used anywhere and is just in the way by adding annoying ifdeffery. Get rid of it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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768f23dc8a
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f79173280c
@ -11,11 +11,7 @@ void reset_cpu(ulong addr);
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void socfpga_per_reset(u32 reset, int set);
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void socfpga_per_reset_all(void);
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#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
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#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
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#else
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#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
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#endif
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/*
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* Define a reset identifier, from which a permodrst bank ID
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@ -264,12 +264,8 @@ int arch_early_init_r(void)
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setbits_le32(&scu_regs->sacr, 0xfff);
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/* Configure the L2 controller to make SDRAM start at 0 */
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#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
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writel(0x2, &nic301_regs->remap);
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#else
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writel(0x1, &nic301_regs->remap); /* remap.mpuzero */
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writel(0x1, &pl310->pl310_addr_filter_start);
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#endif
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/* Add device descriptor to FPGA device table */
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socfpga_fpga_add();
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@ -316,13 +316,6 @@ void socfpga_per_reset_all(void)
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setbits_le32(&reset_manager_base->per0modrst, mask_ecc_ocp);
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}
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#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
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int socfpga_bridges_reset(void)
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{
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/* For SoCFPGA-VT, this is NOP. */
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return 0;
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}
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#else
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int socfpga_bridges_reset(void)
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{
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int ret;
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@ -379,4 +372,3 @@ int socfpga_bridges_reset(void)
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return 0;
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}
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#endif
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@ -69,14 +69,6 @@ void reset_deassert_peripherals_handoff(void)
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writel(0, &reset_manager_base->per_mod_reset);
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}
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#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
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void socfpga_bridges_reset(int enable)
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{
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/* For SoCFPGA-VT, this is NOP. */
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return;
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}
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#else
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#define L3REGS_REMAP_LWHPS2FPGA_MASK 0x10
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#define L3REGS_REMAP_HPS2FPGA_MASK 0x08
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#define L3REGS_REMAP_OCRAM_MASK 0x01
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@ -110,4 +102,3 @@ void socfpga_bridges_reset(int enable)
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}
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return;
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}
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#endif
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@ -78,9 +78,7 @@ static void socfpga_nic301_slave_ns(void)
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void board_init_f(ulong dummy)
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{
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#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
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const struct cm_config *cm_default_cfg = cm_get_default_config();
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#endif
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unsigned long sdram_size;
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unsigned long reg;
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@ -107,7 +105,6 @@ void board_init_f(ulong dummy)
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writel(0x1, &nic301_regs->remap); /* remap.mpuzero */
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writel(0x1, &pl310->pl310_addr_filter_start);
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#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
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debug("Freezing all I/O banks\n");
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/* freeze all IO banks */
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sys_mgr_frzctrl_freeze_req();
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@ -142,8 +139,6 @@ void board_init_f(ulong dummy)
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sysmgr_pinmux_init();
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sysmgr_config_warmrstcfgio(0);
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#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
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/* De-assert reset for peripherals and bridges based on handoff */
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reset_deassert_peripherals_handoff();
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socfpga_bridges_reset(0);
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@ -5,9 +5,6 @@
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#ifndef __CONFIG_SOCFPGA_COMMON_H__
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#define __CONFIG_SOCFPGA_COMMON_H__
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/* Virtual target or real hardware */
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#undef CONFIG_SOCFPGA_VIRTUAL_TARGET
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/*
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* High level configuration
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*/
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@ -76,7 +73,7 @@
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/*
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* Ethernet on SoC (EMAC)
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*/
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#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
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#ifdef CONFIG_CMD_NET
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_MII
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#endif
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@ -95,11 +92,7 @@
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#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
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#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
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#define CONFIG_SYS_TIMER_RATE 2400000
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#else
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#define CONFIG_SYS_TIMER_RATE 25000000
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#endif
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/*
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* L4 Watchdog
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@ -181,9 +174,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
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#define CONFIG_SYS_NS16550_CLK 1000000
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#elif defined(CONFIG_TARGET_SOCFPGA_GEN5)
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#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
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#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART0_ADDRESS
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#define CONFIG_SYS_NS16550_CLK 100000000
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#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
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@ -1848,7 +1848,6 @@ CONFIG_SMSTP6_ENA
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CONFIG_SMSTP7_ENA
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CONFIG_SMSTP8_ENA
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CONFIG_SMSTP9_ENA
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CONFIG_SOCFPGA_VIRTUAL_TARGET
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CONFIG_SOCRATES
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CONFIG_SOC_AU1000
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CONFIG_SOC_AU1100
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