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i2c: i2c-cdns: Prevent early termination of write

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During sequential loading of data, hold the bus to prevent controller
from sending stop signal in case no data is available in fifo.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com
This commit is contained in:
Sai Pavan Boddu 2022-03-01 09:16:52 +01:00 committed by Michal Simek
parent 94b3f3fc7d
commit f76f86029d
1 changed files with 6 additions and 4 deletions
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10
drivers/i2c/i2c-cdns.c
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@ -257,16 +257,18 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,
setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO); setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO);
clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW); clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW);
/* Check message size against FIFO depth, and set hold bus bit /*
* if it is greater than FIFO depth * For sequential data load hold the bus.
*/ */
if (len > CDNS_I2C_FIFO_DEPTH) if (len > 1)
setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD);
/* Clear the interrupts in status register */ /* Clear the interrupts in status register */
writel(CDNS_I2C_INTERRUPTS_MASK, &regs->interrupt_status); writel(CDNS_I2C_INTERRUPTS_MASK, &regs->interrupt_status);
writel(addr, &regs->address); /* In case of Probe (i.e no data), start the transfer */
if (!len)
writel(addr, &regs->address);
while (len-- && !is_arbitration_lost(regs)) { while (len-- && !is_arbitration_lost(regs)) {
writel(*(cur_data++), &regs->data); writel(*(cur_data++), &regs->data);