armv8: ls1043ardb: Add TFABOOT support
TFABOOT support includes: - ls1043ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN and QE address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
@@ -1,5 +1,6 @@
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LS1043A BOARD
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M: Mingkai Hu <mingkai.hu@nxp.com>
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M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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S: Maintained
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F: board/freescale/ls1043ardb/
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F: board/freescale/ls1043ardb/ls1043ardb.c
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@@ -7,6 +8,7 @@ F: include/configs/ls1043ardb.h
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F: configs/ls1043ardb_defconfig
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F: configs/ls1043ardb_nand_defconfig
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F: configs/ls1043ardb_sdcard_defconfig
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F: configs/ls1043ardb_tfa_defconfig
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LS1043A_SECURE_BOOT BOARD
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M: Ruchika Gupta <ruchika.gupta@nxp.com>
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@@ -205,6 +205,19 @@ phys_size_t fixed_sdram(void)
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}
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#endif
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#ifdef CONFIG_TFABOOT
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int fsl_initdram(void)
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{
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gd->ram_size = tfa_get_dram_size();
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if (!gd->ram_size)
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#ifdef CONFIG_SYS_DDR_RAW_TIMING
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gd->ram_size = fsl_ddr_sdram_size();
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#else
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gd->ram_size = 0x80000000;
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#endif
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return 0;
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}
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#else
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int fsl_initdram(void)
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{
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phys_size_t dram_size;
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@@ -236,3 +249,4 @@ int fsl_initdram(void)
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return 0;
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}
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#endif
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@@ -27,6 +27,104 @@
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_TFABOOT
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struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
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{
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"nor",
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CONFIG_SYS_NOR_CSPR,
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CONFIG_SYS_NOR_CSPR_EXT,
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CONFIG_SYS_NOR_AMASK,
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CONFIG_SYS_NOR_CSOR,
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{
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CONFIG_SYS_NOR_FTIM0,
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CONFIG_SYS_NOR_FTIM1,
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CONFIG_SYS_NOR_FTIM2,
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CONFIG_SYS_NOR_FTIM3
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},
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},
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{
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"nand",
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CONFIG_SYS_NAND_CSPR,
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CONFIG_SYS_NAND_CSPR_EXT,
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CONFIG_SYS_NAND_AMASK,
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CONFIG_SYS_NAND_CSOR,
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{
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CONFIG_SYS_NAND_FTIM0,
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CONFIG_SYS_NAND_FTIM1,
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CONFIG_SYS_NAND_FTIM2,
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CONFIG_SYS_NAND_FTIM3
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},
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},
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{
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"cpld",
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CONFIG_SYS_CPLD_CSPR,
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CONFIG_SYS_CPLD_CSPR_EXT,
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CONFIG_SYS_CPLD_AMASK,
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CONFIG_SYS_CPLD_CSOR,
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{
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CONFIG_SYS_CPLD_FTIM0,
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CONFIG_SYS_CPLD_FTIM1,
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CONFIG_SYS_CPLD_FTIM2,
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CONFIG_SYS_CPLD_FTIM3
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},
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}
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};
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struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
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{
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"nand",
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CONFIG_SYS_NAND_CSPR,
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CONFIG_SYS_NAND_CSPR_EXT,
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CONFIG_SYS_NAND_AMASK,
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CONFIG_SYS_NAND_CSOR,
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{
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CONFIG_SYS_NAND_FTIM0,
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CONFIG_SYS_NAND_FTIM1,
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CONFIG_SYS_NAND_FTIM2,
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CONFIG_SYS_NAND_FTIM3
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},
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},
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{
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"nor",
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CONFIG_SYS_NOR_CSPR,
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CONFIG_SYS_NOR_CSPR_EXT,
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CONFIG_SYS_NOR_AMASK,
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CONFIG_SYS_NOR_CSOR,
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{
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CONFIG_SYS_NOR_FTIM0,
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CONFIG_SYS_NOR_FTIM1,
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CONFIG_SYS_NOR_FTIM2,
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CONFIG_SYS_NOR_FTIM3
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},
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},
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{
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"cpld",
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CONFIG_SYS_CPLD_CSPR,
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CONFIG_SYS_CPLD_CSPR_EXT,
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CONFIG_SYS_CPLD_AMASK,
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CONFIG_SYS_CPLD_CSOR,
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{
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CONFIG_SYS_CPLD_FTIM0,
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CONFIG_SYS_CPLD_FTIM1,
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CONFIG_SYS_CPLD_FTIM2,
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CONFIG_SYS_CPLD_FTIM3
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},
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}
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};
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void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
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{
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enum boot_src src = get_boot_src();
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if (src == BOOT_SOURCE_IFC_NAND)
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regs_info->regs = ifc_cfg_nand_boot;
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else
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regs_info->regs = ifc_cfg_nor_boot;
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regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
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}
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#endif
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int board_early_init_f(void)
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{
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fsl_lsch2_early_init_f();
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@@ -38,6 +136,9 @@ int board_early_init_f(void)
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int checkboard(void)
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{
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#ifdef CONFIG_TFABOOT
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enum boot_src src = get_boot_src();
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#endif
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static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
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#ifndef CONFIG_SD_BOOT
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u8 cfg_rcw_src1, cfg_rcw_src2;
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@@ -47,6 +148,12 @@ int checkboard(void)
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printf("Board: LS1043ARDB, boot from ");
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#ifdef CONFIG_TFABOOT
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if (src == BOOT_SOURCE_SD_MMC)
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puts("SD\n");
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else {
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#endif
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#ifdef CONFIG_SD_BOOT
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puts("SD\n");
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#else
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@@ -64,6 +171,9 @@ int checkboard(void)
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printf("Invalid setting of SW4\n");
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#endif
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#ifdef CONFIG_TFABOOT
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}
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#endif
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printf("CPLD: V%x.%x\nPCBA: V%x.0\n", CPLD_READ(cpld_ver),
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CPLD_READ(cpld_ver_sub), CPLD_READ(pcba_ver));
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