armv8: ls1043ardb: Add TFABOOT support

TFABOOT support includes:
 - ls1043ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN and QE address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Rajesh Bhagat
2018-11-05 18:02:44 +00:00
committed by York Sun
parent 50e2d41f6c
commit f71b5f1101
7 changed files with 288 additions and 1 deletions

View File

@@ -1,5 +1,6 @@
LS1043A BOARD
M: Mingkai Hu <mingkai.hu@nxp.com>
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
S: Maintained
F: board/freescale/ls1043ardb/
F: board/freescale/ls1043ardb/ls1043ardb.c
@@ -7,6 +8,7 @@ F: include/configs/ls1043ardb.h
F: configs/ls1043ardb_defconfig
F: configs/ls1043ardb_nand_defconfig
F: configs/ls1043ardb_sdcard_defconfig
F: configs/ls1043ardb_tfa_defconfig
LS1043A_SECURE_BOOT BOARD
M: Ruchika Gupta <ruchika.gupta@nxp.com>

View File

@@ -205,6 +205,19 @@ phys_size_t fixed_sdram(void)
}
#endif
#ifdef CONFIG_TFABOOT
int fsl_initdram(void)
{
gd->ram_size = tfa_get_dram_size();
if (!gd->ram_size)
#ifdef CONFIG_SYS_DDR_RAW_TIMING
gd->ram_size = fsl_ddr_sdram_size();
#else
gd->ram_size = 0x80000000;
#endif
return 0;
}
#else
int fsl_initdram(void)
{
phys_size_t dram_size;
@@ -236,3 +249,4 @@ int fsl_initdram(void)
return 0;
}
#endif

View File

@@ -27,6 +27,104 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
{
"nor",
CONFIG_SYS_NOR_CSPR,
CONFIG_SYS_NOR_CSPR_EXT,
CONFIG_SYS_NOR_AMASK,
CONFIG_SYS_NOR_CSOR,
{
CONFIG_SYS_NOR_FTIM0,
CONFIG_SYS_NOR_FTIM1,
CONFIG_SYS_NOR_FTIM2,
CONFIG_SYS_NOR_FTIM3
},
},
{
"nand",
CONFIG_SYS_NAND_CSPR,
CONFIG_SYS_NAND_CSPR_EXT,
CONFIG_SYS_NAND_AMASK,
CONFIG_SYS_NAND_CSOR,
{
CONFIG_SYS_NAND_FTIM0,
CONFIG_SYS_NAND_FTIM1,
CONFIG_SYS_NAND_FTIM2,
CONFIG_SYS_NAND_FTIM3
},
},
{
"cpld",
CONFIG_SYS_CPLD_CSPR,
CONFIG_SYS_CPLD_CSPR_EXT,
CONFIG_SYS_CPLD_AMASK,
CONFIG_SYS_CPLD_CSOR,
{
CONFIG_SYS_CPLD_FTIM0,
CONFIG_SYS_CPLD_FTIM1,
CONFIG_SYS_CPLD_FTIM2,
CONFIG_SYS_CPLD_FTIM3
},
}
};
struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
{
"nand",
CONFIG_SYS_NAND_CSPR,
CONFIG_SYS_NAND_CSPR_EXT,
CONFIG_SYS_NAND_AMASK,
CONFIG_SYS_NAND_CSOR,
{
CONFIG_SYS_NAND_FTIM0,
CONFIG_SYS_NAND_FTIM1,
CONFIG_SYS_NAND_FTIM2,
CONFIG_SYS_NAND_FTIM3
},
},
{
"nor",
CONFIG_SYS_NOR_CSPR,
CONFIG_SYS_NOR_CSPR_EXT,
CONFIG_SYS_NOR_AMASK,
CONFIG_SYS_NOR_CSOR,
{
CONFIG_SYS_NOR_FTIM0,
CONFIG_SYS_NOR_FTIM1,
CONFIG_SYS_NOR_FTIM2,
CONFIG_SYS_NOR_FTIM3
},
},
{
"cpld",
CONFIG_SYS_CPLD_CSPR,
CONFIG_SYS_CPLD_CSPR_EXT,
CONFIG_SYS_CPLD_AMASK,
CONFIG_SYS_CPLD_CSOR,
{
CONFIG_SYS_CPLD_FTIM0,
CONFIG_SYS_CPLD_FTIM1,
CONFIG_SYS_CPLD_FTIM2,
CONFIG_SYS_CPLD_FTIM3
},
}
};
void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
{
enum boot_src src = get_boot_src();
if (src == BOOT_SOURCE_IFC_NAND)
regs_info->regs = ifc_cfg_nand_boot;
else
regs_info->regs = ifc_cfg_nor_boot;
regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
}
#endif
int board_early_init_f(void)
{
fsl_lsch2_early_init_f();
@@ -38,6 +136,9 @@ int board_early_init_f(void)
int checkboard(void)
{
#ifdef CONFIG_TFABOOT
enum boot_src src = get_boot_src();
#endif
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
#ifndef CONFIG_SD_BOOT
u8 cfg_rcw_src1, cfg_rcw_src2;
@@ -47,6 +148,12 @@ int checkboard(void)
printf("Board: LS1043ARDB, boot from ");
#ifdef CONFIG_TFABOOT
if (src == BOOT_SOURCE_SD_MMC)
puts("SD\n");
else {
#endif
#ifdef CONFIG_SD_BOOT
puts("SD\n");
#else
@@ -64,6 +171,9 @@ int checkboard(void)
printf("Invalid setting of SW4\n");
#endif
#ifdef CONFIG_TFABOOT
}
#endif
printf("CPLD: V%x.%x\nPCBA: V%x.0\n", CPLD_READ(cpld_ver),
CPLD_READ(cpld_ver_sub), CPLD_READ(pcba_ver));