Merge git://www.denx.de/git/u-boot-marvell
This includes Marvell mvpp2 patches with the ethernet support for the ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe and he is okay with me pushing them via the Marvell tree.
This commit is contained in:
@@ -159,7 +159,7 @@
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&cpm_comphy {
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phy0 {
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phy-type = <PHY_TYPE_SGMII2>;
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phy-speed = <PHY_SPEED_3_125G>;
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phy-speed = <PHY_SPEED_1_25G>;
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};
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phy1 {
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@@ -209,3 +209,28 @@
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no-1-8-v;
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non-removable;
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};
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&cpm_mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&cpm_ethernet {
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status = "okay";
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};
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&cpm_eth1 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "sgmii";
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};
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&cpm_eth2 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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@@ -283,3 +283,19 @@
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&cps_utmi0 {
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status = "okay";
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};
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&cpm_mdio {
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&cpm_ethernet {
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status = "okay";
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};
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&cpm_eth2 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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@@ -61,6 +61,43 @@
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interrupt-parent = <&gic>;
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ranges = <0x0 0x0 0xf2000000 0x2000000>;
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cpm_ethernet: ethernet@0 {
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compatible = "marvell,armada-7k-pp22";
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reg = <0x0 0x100000>, <0x129000 0xb000>;
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clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
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clock-names = "pp_clk", "gop_clk", "mg_clk";
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status = "disabled";
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dma-coherent;
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cpm_eth0: eth0 {
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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port-id = <0>;
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gop-port-id = <0>;
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status = "disabled";
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};
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cpm_eth1: eth1 {
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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port-id = <1>;
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gop-port-id = <2>;
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status = "disabled";
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};
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cpm_eth2: eth2 {
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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port-id = <2>;
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gop-port-id = <3>;
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status = "disabled";
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};
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};
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cpm_mdio: mdio@12a200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,orion-mdio";
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reg = <0x12a200 0x10>;
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};
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cpm_syscon0: system-controller@440000 {
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compatible = "marvell,cp110-system-controller0",
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"syscon";
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@@ -61,6 +61,43 @@
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interrupt-parent = <&gic>;
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ranges = <0x0 0x0 0xf4000000 0x2000000>;
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cps_ethernet: ethernet@0 {
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compatible = "marvell,armada-7k-pp22";
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reg = <0x0 0x100000>, <0x129000 0xb000>;
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clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
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clock-names = "pp_clk", "gop_clk", "mg_clk";
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status = "disabled";
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dma-coherent;
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cps_eth0: eth0 {
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interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
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port-id = <0>;
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gop-port-id = <0>;
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status = "disabled";
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};
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cps_eth1: eth1 {
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interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
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port-id = <1>;
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gop-port-id = <2>;
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status = "disabled";
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};
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cps_eth2: eth2 {
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interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
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port-id = <2>;
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gop-port-id = <3>;
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status = "disabled";
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};
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};
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cps_mdio: mdio@12a200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,orion-mdio";
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reg = <0x12a200 0x10>;
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};
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cps_syscon0: system-controller@440000 {
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compatible = "marvell,cp110-system-controller0",
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"syscon";
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