Merge git://git.denx.de/u-boot-marvell
- Fix BUILD_TARGET for ARCH_MVEBU from Baruch - Fix MVEBU PCIe reset issues from Baruch - Increase DDR stability on x530 from Chris
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commit
f49929772c
2
Kconfig
2
Kconfig
@ -227,7 +227,7 @@ config BUILD_ROM
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config BUILD_TARGET
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string "Build target special images"
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default "u-boot-with-spl.sfp" if ARCH_SOCFPGA
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default "u-boot-spl.kwb" if ARCH_MVEBU && SPL_BUILD
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default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
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default "u-boot-elf.srec" if RCAR_GEN3
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default "u-boot.itb" if SPL_LOAD_FIT && ARCH_SUNXI
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default "u-boot.kwb" if KIRKWOOD
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@ -99,6 +99,11 @@
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0 0 0 0 0 0 0xe 0xe 0xe 0xe
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0xe 0xe 0 >;
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cpm_pcie_reset_pins: cpm-pcie-reset-pins {
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marvell,pins = < 32 >;
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marvell,function = <0>;
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};
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cpm_xhci_vbus_pins: cpm-xhci-vbus-pins {
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marvell,pins = < 47 >;
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marvell,function = <0>;
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@ -120,6 +125,9 @@
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&cpm_pcie0 {
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num-lanes = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_pcie_reset_pins>;
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marvell,reset-gpio = <&cpm_gpio1 0 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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@ -132,7 +132,7 @@
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num-lanes = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&cpm_pcie_reset_pins>;
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marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>; /* GPIO[52] */
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marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_LOW>; /* GPIO[52] */
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status = "okay";
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};
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@ -57,7 +57,7 @@ static struct mv_ddr_topology_map board_topology_map = {
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SPEED_BIN_DDR_1866M, /* speed_bin */
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MV_DDR_DEV_WIDTH_16BIT, /* sdram device width */
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MV_DDR_DIE_CAP_4GBIT, /* die capacity */
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MV_DDR_FREQ_933, /* frequency */
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MV_DDR_FREQ_SAR, /* frequency */
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0, 0, /* cas_l cas_wl */
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MV_DDR_TEMP_LOW, /* temperature */
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MV_DDR_TIM_2T} }, /* timing */
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@ -489,7 +489,9 @@ static int pcie_dw_mvebu_probe(struct udevice *dev)
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* using this GPIO.
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*/
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if (dm_gpio_is_valid(&reset_gpio)) {
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dm_gpio_set_value(&reset_gpio, 1);
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dm_gpio_set_value(&reset_gpio, 1); /* assert */
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mdelay(200);
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dm_gpio_set_value(&reset_gpio, 0); /* de-assert */
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mdelay(200);
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}
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#else
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