[PATCH] Update ALPR board files
This update brings the ALPR board support to the newest version. It also fixes a problem with the NAND driver. Signed-off-by: Stefan Roese <sr@denx.de>
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@@ -77,8 +77,12 @@ int board_early_init_f (void)
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mtdcr (uicb0tr, 0x00000000); /* */
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mtdcr (uicb0vr, 0x00000001); /* */
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/* Setup shutdown/SSD empty interrupt as inputs */
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out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_SHUTDOWN | CFG_GPIO_SSD_EMPTY));
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out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_SHUTDOWN | CFG_GPIO_SSD_EMPTY));
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/* Setup GPIO/IRQ multiplexing */
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mtsdr(sdr_pfc0, 0x01a03e00);
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mtsdr(sdr_pfc0, 0x01a33e00);
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return 0;
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}
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@@ -105,26 +109,11 @@ int last_stage_init(void)
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static int board_rev(void)
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{
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int rev;
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u32 pfc0;
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/* Setup GPIO14 & 15 as GPIO */
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mfsdr(sdr_pfc0, pfc0);
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pfc0 |= CFG_GPIO_REV0 | CFG_GPIO_REV1;
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mtsdr(sdr_pfc0, pfc0);
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/* Setup as input */
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out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV0));
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out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV0));
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out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV1));
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out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV1));
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rev = (in32(GPIO0_IR) >> 16) & 0x3;
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/* Setup GPIO14 & 15 as non GPIO again */
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mfsdr(sdr_pfc0, pfc0);
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pfc0 &= ~(CFG_GPIO_REV0 | CFG_GPIO_REV1);
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mtsdr(sdr_pfc0, pfc0);
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return rev;
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return (in32(GPIO0_IR) >> 16) & 0x3;
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}
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int checkboard (void)
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@@ -154,7 +154,7 @@ static int alpr_nand_dev_ready(struct mtd_info *mtd)
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return 1;
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}
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void board_nand_init(struct nand_chip *nand)
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int board_nand_init(struct nand_chip *nand)
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{
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alpr_ndfc = (struct alpr_ndfc_regs *)CFG_NAND_BASE;
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@@ -169,5 +169,7 @@ void board_nand_init(struct nand_chip *nand)
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nand->read_buf = alpr_nand_read_buf;
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nand->verify_buf = alpr_nand_verify_buf;
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nand->dev_ready = alpr_nand_dev_ready;
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return 0;
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}
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#endif
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