arm: dts: stm32mp15: alignment with v5.11-rc2
Device tree alignment with Linux kernel v5.11-rc2 - fix DCMI DMA features on stm32mp15 family - Add alternate pinmux for FMC EBI bus - Harmonize EHCI/OHCI DT nodes name on stm32mp15 - update sdmmc IP version for STM32MP15 - Add LP timer irqs on stm32mp151 - Add LP timer wakeup-source on stm32mp151 - enable HASH by default on stm32mp15 - enable CRC1 by default on stm32mp15 - enable CRYP by default on stm32mp15 - set bus-type in DCMI endpoint for stm32mp157c-ev1 board - reorder spi4 within stm32mp15-pinctrl - add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx - fix mdma1 clients channel priority level on stm32mp151 - fix dmamux reg property on stm32mp151 - adjust USB OTG gadget fifo sizes in stm32mp151 - update stm32mp151 for remote proc synchronization support - support child mfd cells for the stm32mp1 TAMP syscon Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
Patrick Delaunay
parent
2220c2e84d
commit
f050e3fe45
@ -349,6 +349,61 @@
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};
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};
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fmc_pins_b: fmc-1 {
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pins {
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pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
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<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
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<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
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<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
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<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
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<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
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<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
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<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
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<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
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<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
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<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
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<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
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<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
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<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
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<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
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<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
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<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
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<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
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<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
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<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
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<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
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bias-disable;
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drive-push-pull;
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slew-rate = <3>;
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};
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};
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fmc_sleep_pins_b: fmc-sleep-1 {
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pins {
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pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
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<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
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<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
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<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
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<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
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<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
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<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
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<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
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<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
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<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
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<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
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<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
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<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
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<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
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<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
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<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
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<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
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<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
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<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
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<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
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<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
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};
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};
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i2c1_pins_a: i2c1-0 {
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pins {
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pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
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@ -1437,6 +1492,24 @@
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};
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};
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sdmmc2_d47_pins_d: sdmmc2-d47-3 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
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<STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
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<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
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};
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};
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sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
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<STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
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<STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
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<STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
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};
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};
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sdmmc3_b4_pins_a: sdmmc3-b4-0 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
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@ -1721,6 +1794,14 @@
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};
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};
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uart8_rtscts_pins_a: uart8rtscts-0 {
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pins {
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pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
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<STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
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bias-disable;
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};
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};
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usart2_pins_a: usart2-0 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
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@ -41,6 +41,13 @@
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};
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};
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arm-pmu {
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compatible = "arm,cortex-a7-pmu";
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interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>;
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interrupt-parent = <&intc>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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@ -373,8 +380,10 @@
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x40009000 0x400>;
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interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc LPTIM1_K>;
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clock-names = "mux";
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wakeup-source;
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status = "disabled";
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pwm {
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@ -1010,7 +1019,7 @@
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dmamux1: dma-router@48002000 {
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compatible = "st,stm32h7-dmamux";
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reg = <0x48002000 0x1c>;
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reg = <0x48002000 0x40>;
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#dma-cells = <3>;
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dma-requests = <128>;
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dma-masters = <&dma1 &dma2>;
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@ -1058,7 +1067,7 @@
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sdmmc3: sdmmc@48004000 {
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compatible = "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x10153180>;
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arm,primecell-periphid = <0x00253180>;
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reg = <0x48004000 0x400>;
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "cmd_irq";
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@ -1079,9 +1088,9 @@
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resets = <&rcc USBO_R>;
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reset-names = "dwc2";
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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g-rx-fifo-size = <256>;
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g-rx-fifo-size = <512>;
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g-np-tx-fifo-size = <32>;
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g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
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g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
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dr_mode = "otg";
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usb33d-supply = <&usb33>;
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status = "disabled";
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@ -1117,7 +1126,7 @@
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resets = <&rcc CAMITF_R>;
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clocks = <&rcc DCMI>;
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clock-names = "mclk";
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dmas = <&dmamux1 75 0x400 0x0d>;
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dmas = <&dmamux1 75 0x400 0x01>;
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dma-names = "tx";
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status = "disabled";
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};
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@ -1175,8 +1184,10 @@
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x50021000 0x400>;
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interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc LPTIM2_K>;
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clock-names = "mux";
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wakeup-source;
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status = "disabled";
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pwm {
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@ -1202,8 +1213,10 @@
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#size-cells = <0>;
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compatible = "st,stm32-lptimer";
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reg = <0x50022000 0x400>;
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interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc LPTIM3_K>;
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clock-names = "mux";
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wakeup-source;
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status = "disabled";
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pwm {
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@ -1222,8 +1235,10 @@
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lptimer4: timer@50023000 {
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compatible = "st,stm32-lptimer";
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reg = <0x50023000 0x400>;
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interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc LPTIM4_K>;
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clock-names = "mux";
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wakeup-source;
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status = "disabled";
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pwm {
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@ -1236,8 +1251,10 @@
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lptimer5: timer@50024000 {
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compatible = "st,stm32-lptimer";
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reg = <0x50024000 0x400>;
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interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc LPTIM5_K>;
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clock-names = "mux";
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wakeup-source;
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status = "disabled";
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pwm {
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@ -1303,7 +1320,7 @@
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc HASH1>;
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resets = <&rcc HASH1_R>;
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dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
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dmas = <&mdma1 31 0x2 0x1000A02 0x0 0x0>;
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dma-names = "in";
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dma-maxburst = <2>;
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status = "disabled";
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@ -1367,8 +1384,8 @@
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reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
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reg-names = "qspi", "qspi_mm";
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
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<&mdma1 22 0x10 0x100008 0x0 0x0>;
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dmas = <&mdma1 22 0x2 0x100002 0x0 0x0>,
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<&mdma1 22 0x2 0x100008 0x0 0x0>;
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dma-names = "tx", "rx";
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clocks = <&rcc QSPI_K>;
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resets = <&rcc QSPI_R>;
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@ -1379,7 +1396,7 @@
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sdmmc1: sdmmc@58005000 {
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compatible = "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x10153180>;
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arm,primecell-periphid = <0x00253180>;
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reg = <0x58005000 0x1000>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "cmd_irq";
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@ -1394,7 +1411,7 @@
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sdmmc2: sdmmc@58007000 {
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compatible = "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x10153180>;
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arm,primecell-periphid = <0x00253180>;
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reg = <0x58007000 0x1000>;
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interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "cmd_irq";
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@ -1445,7 +1462,7 @@
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status = "disabled";
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};
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usbh_ohci: usbh-ohci@5800c000 {
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usbh_ohci: usb@5800c000 {
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compatible = "generic-ohci";
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reg = <0x5800c000 0x1000>;
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clocks = <&rcc USBH>;
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@ -1454,7 +1471,7 @@
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status = "disabled";
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};
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usbh_ehci: usbh-ehci@5800d000 {
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usbh_ehci: usb@5800d000 {
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compatible = "generic-ehci";
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reg = <0x5800d000 0x1000>;
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clocks = <&rcc USBH>;
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@ -1587,6 +1604,11 @@
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status = "disabled";
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};
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tamp: tamp@5c00a000 {
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compatible = "st,stm32-tamp", "syscon", "simple-mfd";
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reg = <0x5c00a000 0x400>;
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};
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/*
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* Break node order to solve dependency probe issue between
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* pinctrl and exti.
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@ -1765,6 +1787,8 @@
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st,syscfg-holdboot = <&rcc 0x10C 0x1>;
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st,syscfg-tz = <&rcc 0x000 0x1>;
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st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
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st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
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st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
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status = "disabled";
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};
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};
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@ -16,6 +16,12 @@
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};
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};
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arm-pmu {
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interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>, <&cpu1>;
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};
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soc {
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m_can1: can@4400e000 {
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compatible = "bosch,m_can";
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@ -29,6 +29,10 @@
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};
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};
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&cryp1 {
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status = "okay";
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};
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&dsi {
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status = "okay";
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phy-dsi-supply = <®18>;
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@ -89,6 +89,14 @@
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states = <1800000 0x1>,
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<2900000 0x0>;
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};
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vin: vin {
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compatible = "regulator-fixed";
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regulator-name = "vin";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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};
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&adc {
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@ -115,6 +123,14 @@
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cpu-supply = <&vddcore>;
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};
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&crc1 {
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status = "okay";
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};
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&cryp1 {
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status = "okay";
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};
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&dac {
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pinctrl-names = "default";
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pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
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@ -136,6 +152,10 @@
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contiguous-area = <&gpu_reserved>;
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};
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&hash1 {
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status = "okay";
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};
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&i2c4 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c4_pins_a>;
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@ -158,11 +178,18 @@
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regulators {
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compatible = "st,stpmic1-regulators";
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buck1-supply = <&vin>;
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buck2-supply = <&vin>;
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buck3-supply = <&vin>;
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buck4-supply = <&vin>;
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&v3v3>;
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ldo3-supply = <&vdd_ddr>;
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ldo4-supply = <&vin>;
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ldo5-supply = <&v3v3>;
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ldo6-supply = <&v3v3>;
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vref_ddr-supply = <&vin>;
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boost-supply = <&vin>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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@ -90,6 +90,7 @@
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port {
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dcmi_0: endpoint {
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remote-endpoint = <&ov5640_0>;
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bus-type = <5>;
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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@ -76,61 +76,6 @@
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pinctrl-1 = <&fmc_sleep_pins_b &mco2_sleep_pins_a>;
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pinctrl-names = "default", "sleep";
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fmc_pins_b: fmc-0 {
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pins1 {
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pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
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<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
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<STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
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<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
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<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
|
||||
<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
|
||||
<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
|
||||
<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
|
||||
<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
|
||||
<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
|
||||
<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
|
||||
<STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
|
||||
<STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
|
||||
<STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
|
||||
<STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
|
||||
<STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
|
||||
<STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
|
||||
<STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
|
||||
<STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
|
||||
<STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
|
||||
<STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
fmc_sleep_pins_b: fmc-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
|
||||
<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
|
||||
<STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
|
||||
<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
|
||||
<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
|
||||
<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
|
||||
<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
|
||||
<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
|
||||
<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
|
||||
<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
|
||||
<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
|
||||
<STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
|
||||
<STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
|
||||
<STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
|
||||
<STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
|
||||
<STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
|
||||
<STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
|
||||
<STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
|
||||
<STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
|
||||
<STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
|
||||
<STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
|
||||
};
|
||||
};
|
||||
|
||||
mco2_pins_a: mco2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
|
||||
|
||||
@ -80,6 +80,14 @@
|
||||
dais = <&sai2a_port &sai2b_port &i2s2_port>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
vin: vin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vin";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
@ -116,6 +124,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&crc1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dts {
|
||||
status = "okay";
|
||||
};
|
||||
@ -151,6 +163,10 @@
|
||||
contiguous-area = <&gpu_reserved>;
|
||||
};
|
||||
|
||||
&hash1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_a>;
|
||||
@ -238,21 +254,27 @@
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
typec: stusb1600@28 {
|
||||
stusb1600@28 {
|
||||
compatible = "st,stusb1600";
|
||||
reg = <0x28>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpioi>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&stusb1600_pins_a>;
|
||||
|
||||
status = "okay";
|
||||
vdd-supply = <&vin>;
|
||||
|
||||
typec_con: connector {
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
power-role = "sink";
|
||||
power-opmode = "default";
|
||||
power-role = "dual";
|
||||
typec-power-opmode = "default";
|
||||
|
||||
port {
|
||||
con_usbotg_hs_ep: endpoint {
|
||||
remote-endpoint = <&usbotg_hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -266,9 +288,18 @@
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmic1-regulators";
|
||||
buck1-supply = <&vin>;
|
||||
buck2-supply = <&vin>;
|
||||
buck3-supply = <&vin>;
|
||||
buck4-supply = <&vin>;
|
||||
ldo1-supply = <&v3v3>;
|
||||
ldo2-supply = <&vin>;
|
||||
ldo3-supply = <&vdd_ddr>;
|
||||
ldo4-supply = <&vin>;
|
||||
ldo5-supply = <&vin>;
|
||||
ldo6-supply = <&v3v3>;
|
||||
vref_ddr-supply = <&vin>;
|
||||
boost-supply = <&vin>;
|
||||
pwr_sw1-supply = <&bst_out>;
|
||||
pwr_sw2-supply = <&bst_out>;
|
||||
|
||||
@ -657,6 +688,12 @@
|
||||
phy-names = "usb2-phy";
|
||||
usb-role-switch;
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
usbotg_hs_ep: endpoint {
|
||||
remote-endpoint = <&con_usbotg_hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbphyc {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user