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rockchip: px30: add support for setting cpll clock

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Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Chris Morgan 2021-08-05 11:48:47 -05:00 committed by Kever Yang
parent 2d34be0a9e
commit ef120e0b30
1 changed files with 3 additions and 0 deletions
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3
drivers/clk/rockchip/clk_px30.c
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@ -1291,6 +1291,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
case PLL_NPLL: case PLL_NPLL:
ret = px30_clk_set_pll_rate(priv, NPLL, rate); ret = px30_clk_set_pll_rate(priv, NPLL, rate);
break; break;
case PLL_CPLL:
ret = px30_clk_set_pll_rate(priv, CPLL, rate);
break;
case ARMCLK: case ARMCLK:
ret = px30_armclk_set_clk(priv, rate); ret = px30_armclk_set_clk(priv, rate);
break; break;