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arm: imx53: Add support for imx53 boards from K+P

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This commit adds support for DDC and HSC boards from
K+P in u-boot.

Console output:

U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)

CPU:   Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Module EEPROM:
  ID: TQMa53-CB.0401
  SN: 63152762
  MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net:   eth0: ethernet@63fec000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
Lukasz Majewski 2018-04-26 15:07:18 +02:00 committed by Stefano Babic
parent 3edf9ebea0
commit ee94365557
10 changed files with 690 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

135
arch/arm/dts/imx53-kp.dts Normal file
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@ -0,0 +1,135 @@
/*
* Copyright 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*
* SPDX-License-Identifier: GPL-2.0+ or X11
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx53.dtsi"
#include "imx53-pinfunc.h"
/ {
model = "K+P iMX53";
compatible = "kp,imx53-kp", "fsl,imx53";
chosen {
stdout-path = &uart2;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
clock_frequency = <100000>;
scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
status = "okay";
pmic: mc34708@8 {
compatible = "fsl,mc34708";
reg = <0x8>;
};
};
&i2c3 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_gpio>;
clock_frequency = <100000>;
scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx53-kp {
pinctrl_eth: ethgrp {
fsl,pins = <
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
/* The RX_ER pin needs to be pull down */
/* for this device */
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1c0
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
/* PHY RESET */
MX53_PAD_PATA_DA_0__GPIO7_6 0x182
/* VBUS_PWR_EN */
MX53_PAD_PATA_DA_2__GPIO7_8 0x1e4
/* BOOSTER_OFF */
MX53_PAD_EIM_CS0__GPIO2_23 0x1e4
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX53_PAD_KEY_ROW3__I2C2_SDA
(0x1ee | IMX_PAD_SION)
MX53_PAD_KEY_COL3__I2C2_SCL
(0x1ee | IMX_PAD_SION)
>;
};
pinctrl_i2c2_gpio: i2c2grpgpio {
fsl,pins = <
MX53_PAD_KEY_ROW3__GPIO4_13 0x1e4
MX53_PAD_KEY_COL3__GPIO4_12 0x1e4
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX53_PAD_GPIO_6__I2C3_SDA (0x1ee | IMX_PAD_SION)
MX53_PAD_GPIO_5__I2C3_SCL (0x1ee | IMX_PAD_SION)
>;
};
pinctrl_i2c3_gpio: i2c3grpgpio {
fsl,pins = <
MX53_PAD_GPIO_6__GPIO1_6 0x1e4
MX53_PAD_GPIO_5__GPIO1_5 0x1e4
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
>;
};
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};

12
arch/arm/mach-imx/mx5/Kconfig
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@ -16,6 +16,17 @@ choice
prompt "MX5 board select"
optional
config TARGET_KP_IMX53
bool "Support K+P imx53 board"
select BOARD_LATE_INIT
select MX53
select DM
select DM_SERIAL
select DM_ETH
select DM_I2C
select DM_GPIO
select DM_PMIC
config TARGET_M53EVK
bool "Support m53evk"
select MX53
@ -79,6 +90,7 @@ source "board/freescale/mx53loco/Kconfig"
source "board/freescale/mx53smd/Kconfig"
source "board/ge/mx53ppd/Kconfig"
source "board/inversepath/usbarmory/Kconfig"
source "board/k+p/kp_imx53/Kconfig"
source "board/technologic/ts4800/Kconfig"
endif

15
board/k+p/kp_imx53/Kconfig Normal file
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@ -0,0 +1,15 @@
if TARGET_KP_IMX53
config SYS_BOARD
default "kp_imx53"
config SYS_VENDOR
default "k+p"
config SYS_SOC
default "mx5"
config SYS_CONFIG_NAME
default "kp_imx53"
endif

6
board/k+p/kp_imx53/MAINTAINERS Normal file
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@ -0,0 +1,6 @@
KP_IMX53_HSC BOARD
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
F: board/k+p/kp_imx53/
F: include/configs/kp_imx53.h
F: configs/kp_imx53_defconfig

8
board/k+p/kp_imx53/Makefile Normal file
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@ -0,0 +1,8 @@
#
# Copyright (C) 2018, DENX Software Engineering
# Lukasz Majewski <lukma@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += kp_imx53.o kp_id_rev.o

121
board/k+p/kp_imx53/kp_id_rev.c Normal file
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@ -0,0 +1,121 @@
/*
* Copyright (C) 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*
* Based on code developed by:
*
* Copyright (C) 2012 TQ-Systems GmbH
* Daniel Gericke <daniel.gericke@tqs.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <environment.h>
#include <i2c.h>
#include "kp_id_rev.h"
static int eeprom_has_been_read;
static struct id_eeprom eeprom;
void show_eeprom(void)
{
char safe_string[33];
int i;
u8 *p;
puts("Module EEPROM:\n");
/* ID */
for (i = 0; i <= sizeof(eeprom.id) && 0xff != eeprom.id[i]; ++i)
safe_string[i] = eeprom.id[i];
safe_string[i] = '\0';
if (!strncmp(safe_string, "TQM", 3)) {
printf(" ID: %s\n", safe_string);
env_set("boardtype", safe_string);
} else {
puts(" unknown hardware variant\n");
}
/* Serial number */
for (i = 0; (sizeof(eeprom.serial) >= i) &&
(eeprom.serial[i] >= 0x30) &&
(eeprom.serial[i] <= 0x39); ++i)
safe_string[i] = eeprom.serial[i];
safe_string[i] = '\0';
if (strlen(safe_string) == 8) {
printf(" SN: %s\n", safe_string);
env_set("serial#", safe_string);
} else {
puts(" unknown serial number\n");
}
/* MAC address */
p = eeprom.mac;
if (!is_valid_ethaddr(p)) {
printf(" Not valid ETH EEPROM addr!\n");
return;
}
printf(" MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
p[0], p[1], p[2], p[3], p[4], p[5]);
eth_env_set_enetaddr("ethaddr", p);
}
int read_eeprom(void)
{
struct udevice *dev;
int ret;
if (eeprom_has_been_read)
return 0;
ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
CONFIG_SYS_I2C_EEPROM_ADDR,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev);
if (ret) {
printf("Cannot find EEPROM !\n");
return ret;
}
ret = dm_i2c_read(dev, 0x0, (uchar *)&eeprom, sizeof(eeprom));
eeprom_has_been_read = (ret == 0) ? 1 : 0;
return ret;
}
int read_board_id(void)
{
unsigned char rev_id = 0x42;
char rev_str[32], buf[8];
struct udevice *dev;
int ret;
ret = i2c_get_chip_for_busnum(2, 0x22, 1, &dev);
if (ret) {
printf("Cannot find pcf8574 IO expander !\n");
return ret;
}
dm_i2c_read(dev, 0x0, &rev_id, sizeof(rev_id));
sprintf(rev_str, "%02X", rev_id);
if (rev_id & 0x80) {
printf("BBoard:4x00 Rev:%s\n", rev_str);
env_set("boardtype", "ddc");
env_set("fit_config", "imx53_kb_conf");
} else {
printf("BBoard:40x0 Rev:%s\n", rev_str);
env_set("boardtype", "hsc");
env_set("fit_config", "imx53_kb_40x0_conf");
}
sprintf(buf, "kp-%s", env_get("boardtype"));
env_set("boardname", buf);
env_set("boardsoc", "imx53");
env_set("kb53_rev", rev_str);
return 0;
}

28
board/k+p/kp_imx53/kp_id_rev.h Normal file
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@ -0,0 +1,28 @@
/*
* Copyright (C) 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*
* Based on code developed by:
*
* Copyright (C) 2012 TQ-Systems GmbH
* Daniel Gericke <daniel.gericke@tqs.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __KP_ID_REV_H_
#define __KP_ID_REV_H_
struct id_eeprom {
u8 hrcw_primary[0x20];
u8 mac[6]; /* 0x20 ... 0x25 */
u8 rsv1[10];
u8 serial[8]; /* 0x30 ... 0x37 */
u8 rsv2[8];
u8 id[0x40]; /* 0x40 ... 0x7f */
} __packed;
void show_eeprom(void);
int read_eeprom(void);
int read_board_id(void);
#endif /* __KP_ID_REV_H_ */

212
board/k+p/kp_imx53/kp_imx53.c Normal file
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@ -0,0 +1,212 @@
/*
* Copyright (C) 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/iomux-mx53.h>
#include <asm/arch/clock.h>
#include <asm/gpio.h>
#include <mmc.h>
#include <fsl_esdhc.h>
#include <power/pmic.h>
#include <fsl_pmic.h>
#include "kp_id_rev.h"
#define VBUS_PWR_EN IMX_GPIO_NR(7, 8)
#define PHY_nRST IMX_GPIO_NR(7, 6)
#define BOOSTER_OFF IMX_GPIO_NR(2, 23)
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
u32 size;
size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
gd->ram_size = size;
return 0;
}
int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return 0;
}
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
struct fuse_bank *bank = &iim->bank[0];
struct fuse_bank0_regs *fuse =
(struct fuse_bank0_regs *)bank->fuse_regs;
int rev = readl(&fuse->gp[6]);
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#ifdef CONFIG_USB_EHCI_MX5
int board_ehci_hcd_init(int port)
{
gpio_request(VBUS_PWR_EN, "VBUS_PWR_EN");
gpio_direction_output(VBUS_PWR_EN, 1);
return 0;
}
#endif
#ifdef CONFIG_FSL_ESDHC
struct fsl_esdhc_cfg esdhc_cfg[] = {
{MMC_SDHC3_BASE_ADDR},
};
int board_mmc_getcd(struct mmc *mmc)
{
return 1; /* eMMC is always present */
}
#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP)
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
PAD_CTL_DSE_HIGH)
int board_mmc_init(bd_t *bis)
{
int ret;
static const iomux_v3_cfg_t sd3_pads[] = {
NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD,
SD_CMD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL),
NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL),
};
esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
imx_iomux_v3_setup_multiple_pads(sd3_pads, ARRAY_SIZE(sd3_pads));
ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
if (ret)
return ret;
return 0;
}
#endif
static int power_init(void)
{
struct udevice *dev;
int ret;
ret = pmic_get("mc34708", &dev);
if (ret) {
printf("%s: mc34708 not found !\n", __func__);
return ret;
}
/* Set VDDGP to 1.110V for 800 MHz on SW1 */
pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708,
SWx_1_110V_MC34708);
/* Set VCC as 1.30V on SW2 */
pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708,
SWx_1_300V_MC34708);
/* Set global reset timer to 4s */
pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708,
TIMER_4S_MC34708);
return ret;
}
static void setup_clocks(void)
{
int ret;
u32 ref_clk = MXC_HCLK;
/*
* CPU clock set to 800MHz and DDR to 400MHz
*/
ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK);
if (ret)
printf("CPU: Switch CPU clock to 800MHZ failed\n");
ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
if (ret)
printf("CPU: Switch DDR clock to 400MHz failed\n");
}
static void setup_ups(void)
{
gpio_request(BOOSTER_OFF, "BOOSTER_OFF");
gpio_direction_output(BOOSTER_OFF, 0);
}
int board_early_init_f(void)
{
return 0;
}
/*
* Do not overwrite the console
* Use always serial for U-Boot console
*/
int overwrite_console(void)
{
return 1;
}
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
return 0;
}
void eth_phy_reset(void)
{
gpio_request(PHY_nRST, "PHY_nRST");
gpio_direction_output(PHY_nRST, 1);
udelay(50);
gpio_set_value(PHY_nRST, 0);
udelay(400);
gpio_set_value(PHY_nRST, 1);
udelay(50);
}
int board_late_init(void)
{
int ret = 0;
setup_ups();
if (!power_init())
setup_clocks();
ret = read_eeprom();
if (ret)
printf("Error %d reading EEPROM content!\n", ret);
eth_phy_reset();
show_eeprom();
read_board_id();
return ret;
}

40
configs/kp_imx53_defconfig Normal file
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@ -0,0 +1,40 @@
CONFIG_ARM=y
CONFIG_ARCH_MX5=y
CONFIG_SYS_TEXT_BASE=0x77800000
CONFIG_TARGET_KP_IMX53=y
# CONFIG_CMD_BMODE is not set
CONFIG_DEFAULT_DEVICE_TREE="imx53-kp"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR=1
CONFIG_PHY_SMSC=y
CONFIG_FEC_MXC=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_DM_PMIC_MC34708=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=2
CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y

113
include/configs/kp_imx53.h Normal file
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@ -0,0 +1,113 @@
/*
* Copyright (C) 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H_
#define __CONFIG_H_
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#define CONFIG_SYS_FSL_CLK
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 1
/* Eth Configs */
#define CONFIG_MII
/* USB Configs */
#define CONFIG_USB_EHCI_MX5
#define CONFIG_MXC_USB_PORT 1
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_EEPROM_BUS_NUM 1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Command definition */
#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc1,115200\0" \
"fdt_addr=0x75000000\0" \
"fdt_high=0xffffffff\0" \
"scriptaddr=0x74000000\0" \
"kernel_file=fitImage\0"\
"rdinit=/sbin/init\0" \
"addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \
"upd_image=st.4k\0" \
"uboot_file=u-boot.imx\0" \
"updargs=setenv bootargs console=${console} ${smp}"\
"rdinit=${rdinit} ${debug} ${displayargs}\0" \
"loadusb=usb start; " \
"fatload usb 0 ${loadaddr} ${upd_image}\0" \
"up=if tftp ${loadaddr} ${uboot_file}; then " \
"setexpr blkc ${filesize} / 0x200; " \
"setexpr blkc ${blkc} + 1; " \
"mmc write ${loadaddr} 0x2 ${blkc}" \
"; fi\0" \
"upwic=setenv wic_file kp-image-kp${boardsoc}${boardtype}.wic; "\
"if tftp ${loadaddr} ${wic_file}; then " \
"setexpr blkc ${filesize} / 0x200; " \
"setexpr blkc ${blkc} + 1; " \
"mmc write ${loadaddr} 0x0 ${blkc}" \
"; fi\0" \
"usbupd=echo Booting update from usb ...; " \
"setenv bootargs; " \
"run updargs; " \
"run loadusb; " \
"bootm ${loadaddr}#${fit_config}\0" \
BOOTENV
#define CONFIG_BOOTCOMMAND "run usbupd; run distro_bootcmd"
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
#define CONFIG_ARP_TIMEOUT 200UL
/* Miscellaneous configurable options */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE (512 * SZ_1M)
#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE)
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* environment organization */
#define CONFIG_ENV_OFFSET (SZ_1M)
#define CONFIG_ENV_SIZE (SZ_8K)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif /* __CONFIG_H_ */